AD7520 Intersil Corporation, AD7520 Datasheet - Page 6

• Manufacturer Part Number: AD7520
• Description: 10-Bit/ 12-Bit/ Multiplying D/A Converters
• Manufacturer: Intersil Corporation

Applications
Unipolar Binary Operation
The circuit configuration for operating the AD7520 in unipo-
lar mode is shown in Figure 8. Similar circuits can be used
for AD7521, AD7530 and AD7531. With positive and nega-
tive V
cation. The “Digital Input Code/Analog Output Value” table
for unipolar mode is given in Table 1.
NOTES:
Zero Offset Adjustment
Gain Adjustment
Bipolar (Offset Binary) Operation
The circuit configuration for operating the AD7520 in the
bipolar mode is given in Figure 9. Similar circuits can be
used for AD7521, AD7530 and AD7531. Using offset binary
digital input codes and positive and negative reference volt-
age values, 4-Quadrant multiplication can be realized. The
1. Connect all digital inputs to GND.
2. Adjust the offset zero adjust trimpot of the output
1. Connect all digital inputs to V+.
2. Monitor VOUT for a -V
3. To decrease V
4. To increase V
1. LSB = 2
2. N = 10 for 7520, 7530;
DIGITAL
FIGURE 8. UNIPOLAR BINARY OPERATION (2-QUADRANT
TABLE 1. CODE TABLE - UNlPOLAR BINARY OPERATION
INPUT
operational amplifier for 0V at V
AD7520/30 and N = 12 for AD7521/31).
between the reference voltage and the V
the I
N = 12 for 7521, 7531.
REF
BIT 10 (LSB)
BIT 1 (MSB)
OUT1
DIGITAL INPUT
1111111111
1000000001
1000000000
0111111111
0000000001
0000000000
values the circuit is capable of 2-Quadrant multipli-
-N
V
MULTIPLICATION)
REF
V
amplifier feedback loop.
REF
OUT
OUT
.
4
5
13 3
AD7520
15
, connect a series resistor (0 to 250 ) in
, connect a series resistor (0 to 250 )
+15V
GND
14
REF
16
1
2
I
I
R
OUT1
OUT2
(1-2
FEEDBACK
-V
-V
-V
-V
0
-V
REF
REF
REF
REF
REF
-N
OUT
) reading. (N = 10 for
ANALOG OUTPUT
/2
AD7520, AD7530, AD7521, AD7531
(1-2
(
(2
(
1
1
/
-N
.
/
2
2
-2
-N
)
+ 2
-N
)
6
-
+
REF
)
-N
)
terminal.
V
OUT
10-12
“Digital Input Code/Analog Output Value” table for bipolar
mode is given in Table 2.
NOTES:
A “Logic 1” input at any digital input forces the corresponding
ladder switch to steer the bit current to I
input forces the bit current to I
I
another. The current amplifier at I
I
put sums the two currents. This configuration doubles the out-
put range. The difference current resulting at zero offset binary
code, (MSB = “Logic 1”, All other bits = “Logic 0”), is corrected
by using an external resistor, (10M ), from V
Offset Adjustment
Gain Adjustment
1. Adjust V
2. Connect all digital inputs to “Logic 1”.
3. Adjust I
1. Connect all digital inputs to V+.
3. To increase V
4. Connect MSB (Bit 1) to “Logic 1” and all other bits to “Logic 0”.
5. Adjust I
2. Monitor V
4. To decrease V
FIGURE 9. BIPOLAR OPERATION (4-QUADRANT MULTIPLICATION)
OUT1
OUT2
1. LSB = 2
I
V
AD7520 and AD7530, and N = 12 for AD7521 and AD7531).
between V
between the reference voltage and the V
V
OUT2
BIT 10
(MSB)
OUT
BIT 1
(LSB)
REF
TABLE 2. BlPOLAR (OFFSET BINARY) CODE TABLE
current and the transconductance amplifier at I
and I
DIGITAL INPUT
.
1111111111
1000000001
1000000000
0111111111
0000000001
0000000000
amplifier output.
OUT1
OUT2
4
5
13 3
-(N-1)
AD7520
15
REF
OUT
OUT2
OUT
+15V
amplifier offset adjust trimpot for 0V 1mV at
to approximately +10V.
amplifier offset adjust trimpot for 0V 1mV at
14
V
OUT
for a -V
OUT
16
REF
1
2
and R
bus currents are complements of one
I
, connect a series resistor of up to 250
R
OUT1
, connect a series resister of up to 250
.
I
FEEDBACK
OUT2
REF
FEEDBACK
6
(1-2-
-
+
R1 10K
0.01%
-V
0
V
V
V
2. N = 10 for 7520, 7521;
OUT2
-V
OUT2
(N-1)
REF
REF
REF
REF
REF
N = 12 for 7530, 7531.
.
ANALOG OUTPUT
(2
(1-2
R2 10K
volts reading. (N = 10 for
0.01%
(1-2
10M
bus. For any code the
(2
changes the polarity of
-(N-1)
R3
OUT1
-(N-1)
-(N-1)
-(N-1)
REF
REF
)
)
bus. A “Logic 0”
)
)
6
-
+
to I
terminal.
OUT2
OUT1
.
out-