HEF40161BD Philips Semiconductors, HEF40161BD Datasheet
HEF40161BD
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HEF40161BD Summary of contents
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DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF40162B MSI 4-bit synchronous decade counter with synchronous reset Product specification File ...
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... Philips Semiconductors 4-bit synchronous decade counter with synchronous reset DESCRIPTION The HEF40162B is a fully synchronous edge-triggered 4-bit decade counter with a clock input (CP), four synchronous parallel data inputs (P synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP), count enable trickle (CET) ...
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Acrobat reader. white to force landscape pages to be ... Fig.2 Logic diagram. ...
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... Philips Semiconductors 4-bit synchronous decade counter with synchronous reset Fig.3 Pinning diagram. HEF40162BP(N): 16-lead DIL; plastic (SOT38-1) HEF40162BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF40162BT(D): 16-lead SO; plastic (SOT109- Package Designator North America SYNCHRONOUS MODE SELECTION SR PE CEP CET ...
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... Philips Semiconductors 4-bit synchronous decade counter with synchronous reset AC CHARACTERISTICS input transition times SS amb V Dynamic power dissipation per 10 package ( CHARACTERISTICS pF; input transition times SS amb L V Propagation delays HIGH to LOW 10 15 LOW to HIGH ...
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... Philips Semiconductors 4-bit synchronous decade counter with synchronous reset AC CHARACTERISTICS pF; input transition times SS amb Minimum clock pulse width; LOW 10 15 Set-up times CEP, CET Hold times ...
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... Philips Semiconductors 4-bit synchronous decade counter with synchronous reset Conditions PE = LOW HIGH 0 3 Fig.5 Waveforms showing set-up times and hold times for SR input and minimum CP pulse width. Condition HIGH. Fig.6 Waveforms showing set-up times and hold times for CEP and CET inputs. ...
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... Philips Semiconductors 4-bit synchronous decade counter with synchronous reset Conditions PE = LOW SR = HIGH Fig.7 Waveforms showing set-up times and hold times for P Condition SR = HIGH Fig.8 Waveforms showing set-up times and hold times for PE input. Note Set-up and hold times are shown as positive values but may be specified as negative values. ...
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... Philips Semiconductors 4-bit synchronous decade counter with synchronous reset APPLICATION INFORMATION An example of an application for the HEF40162B is: Programmable decade counter. January 1995 Fig.9 Timing diagram. 9 Product specification HEF40162B MSI ...
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... Philips Semiconductors 4-bit synchronous decade counter with synchronous reset NOTE On the TC outputs, glitches can occur during counting. In totally synchronous mode they will not have any adverse affect. However the TC output in asynchronous mode can cause problems. January 1995 Fig.10 Synchronous multi-stage counting scheme. ...