HEF4042BF Philips Semiconductors, HEF4042BF Datasheet
HEF4042BF
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HEF4042BF Summary of contents
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DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4042B MSI Quadruple D-latch Product specification File under Integrated Circuits, IC04 INTEGRATED ...
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... Philips Semiconductors Quadruple D-latch DESCRIPTION The HEF4042B is a 4-bit latch with four data inputs ( four buffered latch outputs (O 3 complementary latch outputs (O 0 enable inputs (E and E ). Information transferred while both same state, either HIGH or LOW. O ...
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... Philips Semiconductors Quadruple D-latch Fig.3 Logic diagram. Fig.4 Logic diagram (one latch). January 1995 FUNCTION TABLE Note HIGH state (the more positive voltage LOW state (the less positive voltage). 3 Product specification HEF4042B MSI ...
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... Philips Semiconductors Quadruple D-latch AC CHARACTERISTICS pF; input transition times SS amb L Propagation delays HIGH to LOW LOW to HIGH HIGH to LOW LOW to HIGH Output transition times HIGH to LOW LOW to HIGH Set-up time D E Hold time D E Minimum enable pulse width ...
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... Philips Semiconductors Quadruple D-latch Either held HIGH or LOW while the other enable input is pulsed the function table shows. Fig.5 Waveforms showing propagation delays for with latch enabled. January 1995 5 Product specification HEF4042B MSI ...
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... Philips Semiconductors Quadruple D-latch Fig.6 Waveforms showing minimum enable pulse width, set-up time and hold time for E and D. Set-up and hold-times are shown as positive values but may be specified as negative values. January 1995 6 Product specification HEF4042B MSI ...