74VHCT00 STMicroelectronics, 74VHCT00 Datasheet

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74VHCT00

Manufacturer Part Number
74VHCT00
Description
QUAD 2-INPUT NAND GATE
Manufacturer
STMicroelectronics
Datasheet

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DESCRIPTION
The 74VHCT00A is an advanced high-speed
CMOS QUAD 2-INPUT NAND GATE fabricated
with sub-micron silicon gate and double-layer
metal wiring C
PIN CONNECTION AND IEC LOGIC SYMBOLS
August 1999
HIGH SPEED: t
LOW POWER DISSIPATION:
I
COMPATIBLE WITH TTL OUTPUTS:
V
POWER DOWN PROTECTION ON INPUTS &
OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 00
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
CC
PLH
OH
IH
CC
= 2 A (MAX.) at T
= 2V (MIN), V
| = I
(OPR) = 4.5V to 5.5V
t
PHL
OL
= 8 mA (MIN)
2
MOS technology.
OLP
PD
IL
= 5 ns (TYP.) at V
= 0.8V (MAX)
= 0.8V (Max.)
A
= 25
o
C
CC
= 5V
QUAD 2-INPUT NAND GATE
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
(Micro Package)
74VHCT00AM
M
ORDER CODES :
74VHCT00A
74VHCT00AT
(TSSOP Package)
PRELIMINARY DATA
T
1/7

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74VHCT00 Summary of contents

Page 1

... PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 00 IMPROVED LATCH-UP IMMUNITY LOW NOISE 0.8V (Max.) OLP DESCRIPTION The 74VHCT00A is an advanced high-speed CMOS QUAD 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer 2 metal wiring C MOS technology. PIN CONNECTION AND IEC LOGIC SYMBOLS ...

Page 2

... INPUT EQUIVALENT CIRCUIT ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Supply Voltage Input Voltage Output Voltage (see note Output Voltage (see note Input Diode Current Output Diode Current Output Current Ground Current ...

Page 3

... CC GND 5.5V OUT = Test Co ndition (*) (pF ) Min. Typ . 15 5.0 50 5.5 T est Cond ition Min. Typ . 4 10.5 (opr 74VHCT00A Value - Max. Min . Max 0.8 0.8 V 4.4 V 3.8 0.1 0.1 V 0.36 0.44 0.1 1 1.35 1.5 mA 0.5 5.0 A Value ...

Page 4

... DYNAMIC SWITCHING CHARACTERISTICS Symb ol Parameter V (V) V Dynamic Low Voltage 5.0 OLP Quiet Output (note OLV V Dynamic High Voltage 5.0 IHD Input (note Dynamic Low Voltage 5.0 ILD Input (note Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.0, (n -1) outputs switching and one output atGND. ...

Page 5

... MIN. TYP 0 0.35 b1 0. 8.55 E 5.8 e 1.27 e3 7.62 F 3.8 G 4 inch MAX. MIN. TYP. 1.75 0.2 0.003 1.65 0.46 0.013 0.25 0.007 0.019 45 (typ.) 8.75 0.336 6.2 0.228 0.050 0.300 4.0 0.149 5.3 0.181 1.27 0.019 0.68 8 (max.) 74VHCT00A MAX. 0.068 0.007 0.064 0.018 0.010 0.344 0.244 0.157 0.208 0.050 0.026 P013G 5/7 ...

Page 6

... TSSOP14 MECHANICAL DATA DIM. MIN. TYP 0.05 0.10 A2 0.85 b 0.19 c 0.09 D 4.9 E 6.25 E1 4.3 e 0.65 BSC 0.50 0. PIN 1 IDENTIFICATION 1 6/7 mm MAX. MIN. 1.1 0.15 0.002 0.9 0.95 0.335 0.30 0.0075 0.20 0.0035 5 5.1 0.193 6.4 6.5 0.246 4.4 4.48 0.169 0.70 0.020 inch TYP. MAX. 0.433 0.004 0.006 0.354 ...

Page 7

... The ST logo is a trademark of STMicroelectronics 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com . 74VHCT00A 7/7 ...

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