74VHCT74 Fairchild Semiconductor, 74VHCT74 Datasheet

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74VHCT74

Manufacturer Part Number
74VHCT74
Description
Dual D-Type Flip-Flop with Preset and Clear
Manufacturer
Fairchild Semiconductor
Datasheet

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© 1999 Fairchild Semiconductor Corporation
74VHCT74AM
74VHCT74ASJ
74VHCT74AMTC
74VHCT74AN
74VHCT74A
Dual D-Type Flip-Flop with Preset and Clear
General Description
The VHCT74A is an advanced high speed CMOS Dual D-
Type Flip-Flop fabricated with silicon gate CMOS technol-
ogy. It achieves the high speed operation similar to equiva-
lent Bipolar Schottky TTL while maintaining the CMOS low
power dissipation. The signal level applied to the D INPUT
is transferred to the Q OUTPUT during the positive going
transition of the CK pulse. CLR and PR are independent of
the CK and are accomplished by setting the appropriate
input LOW.
Protection circuits ensure that 0V to 7V can be applied to
the input pins without regard to the supply voltage and to
the output pins with V
device destruction due to mismatched supply and input/
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Order Number
D
CK
CLR
PR
Q
Pin Names
1
1
, D
, Q
1
1
, CK
, PR
1
2
, CLR
1
, Q
Package Number
2
2
2
, Q
2
CC
MTC14
IEEE/IEC
M14A
M14D
N14A
2
0V. These circuits prevent
Data Inputs
Clock Pulse Inputs
Direct Clear Inputs
Direct Preset Inputs
Outputs
Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DS500026.prf
output voltages. This device can be used to interface 3V to
5V systems and two supply systems such as battery
backup.
Features
Connection Diagram
Truth Table
High speed: f
High noise immunity: V
Power down protection is provided on all inputs and
outputs
Low power dissipation:
I
Pin and function compatible with 74HCT74
CC
CLR
H
H
H
H
L
L
Package Description
2 A (max) at T
PR
H
H
H
H
L
L
Inputs
MAX
D
X
X
X
H
X
L
160 MHz (typ) at T
A
IH
CK



X
X
X
25 C
2.0V, V
July 1997
Revised April 1999
Q
Outputs
Q
H
H
H
L
L
n
IL
Q
Q
www.fairchildsemi.com
H
H
H
A
L
L
0.8V
n
25 C
Clear
Preset
No
Change
Function

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74VHCT74 Summary of contents

Page 1

... MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHCT74AN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage (V ) OUT (Note 2) 0. (Note 3) Input Diode Current ( Output Diode Current ( (Note ...

Page 3

AC Electrical Characteristics V Symbol Parameter (V) (Note 6) f Maximum Clock 5.0 MAX Frequency 5.0 t Propagation Delay Time 5.0 PLH t 5.0 (CK-Q, Q) PHL t Propagation Delay time 5.0 PLH t 5.0 (CLR, PR -Q, Q) PHL ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M14A Package Number M14D 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN ...

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