74LVC257A Philips Semiconductors, 74LVC257A Datasheet - Page 2

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74LVC257A

Manufacturer Part Number
74LVC257A
Description
Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs 3-State
Manufacturer
Philips Semiconductors
Datasheet

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1. C
Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0 V; T
NOTE:
ORDERING INFORMATION
PIN CONFIGURATION
t
C
C
16-Pin Plastic SO
16-Pin Plastic SSOP Type II
16-Pin Plastic TSSOP Type I
1998 Jul 29
PHL
SYMBOL
Wide supply voltage range of 1.2 to 3.6 V
In accordance with JEDEC standard no. 8-1A
CMOS lower power consumption
Direct interface with TTL levels
Output drive capability 50 W transmission lines at 85 C
5 Volt tolerant inputs/outputs, for interfacing with 5 Volt logic
Quad 2-input multiplexer with 5 Volt tolerant
inputs/outputs (3-State)
I
PD
P
f
f
i
o
PD
D
= input frequency in MHz; C
/t
= output frequency in MHz; V
(C
PLH
= C
L
is used to determine the dynamic power dissipation (P
PD
V
PACKAGES
CC
amb
Propagation delay
nl
S to nY
Input capacitance
Power dissipation capacitance per channel
V
2
0
CC
, nl
= 25 C; t
GND
f
1I
2
1I
2l
2l
2Y
o
IY
1
S
) = sum of the outputs.
0
1
0
1
to nY
f
i
2
3
4
5
6
7
8
1
) (C
r
=t
f
PARAMETER
L
2.5 ns
L
= output load capacitance in pF;
CC
V
CC
= supply voltage in V;
2
TEMPERATURE RANGE
SV00636
16
15
14
12
11
10
13
9
f
o
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
) where:
V
OE
4l
4l
4Y
3l
3l
3Y
CC
0
1
0
1
C
V
V
D
L
CC
I
= GND to V
= 50 pF;
in W)
= 3.3 V
OUTSIDE NORTH AMERICA
2
CONDITIONS
DESCRIPTION
The 74LVC257A is a high-performance, low-power, low-voltage,
Si-gate CMOS device and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3V or 5.0V devices. In 3-State
operation, outputs can handle 5V. This feature allows the use of
these devices as translators in a mixed 3.3V/5V environment.
The 74LVC257A is a quad 2-input multiplexer with 3-state outputs,
which select 4 bits of data from two sources and are controlled by a
common data select input (S). The data inputs from source 0 (1l
4l
source 1 (1l
outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs.
The 74LVC257A is the logic implementation of a 4-pole, 2-position
switch, where the position of the switch is determined by the logic
levels applied to S. The outputs are forced to a high impedance
OFF-state when OE is HIGH.
CC
LOGIC SYMBOL
74LVC257A PW
74LVC257A DB
74LVC257A D
0
) are selected when input S is LOW and the data inputs from
1
1
to 4l
1
15
1
) are selected when S in HIGH. Data appears at the
S
OE
1I
2
74LVC257APW DH
0
NORTH AMERICA
74LVC257A DB
11
3
74LVC257A D
I
TYPICAL
2I
1Y
5
4
0
3.9
3.5
5.0
30
2I
2Y
6
7
1
11
3I
3Y
9
0
10
12
3I
4Y
1
74LVC257A
Product specification
14
4I
0
SV00637
13
4I
PKG. DWG. #
853-2101 19802
1
SOT109-1
SOT338-1
SOT403-1
UNIT
pF
pF
ns
0
to

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