PCF85116-3P Philips Semiconductors, PCF85116-3P Datasheet - Page 3

• Manufacturer Part Number: PCF85116-3P
• Description: 2048 x 8-bit CMOS EEPROM with I2C-bus interface
• Manufacturer: Philips Semiconductors

Philips Semiconductors
1
3
1997 Apr 02
V
I
I
I
SYMBOL
DDR
DDW
stb
Low power CMOS:
– maximum operating current 1.0 mA
– maximum standby current 10 A (at 5.5 V),
Non-volatile storage of 16 kbits organized as eight
blocks of 256
Single supply with full operation down to 2.7 V
On-chip voltage multiplier
Serial input/output I
and 400 kbits/s fast-mode)
Write operations: multi byte write mode up to 32 bytes
Write-protection input
Read operations:
– sequential read
– random read
Internal timer for writing (no external components)
Power-on-reset
High reliability by using redundant EEPROM cells
Endurance: 1000000 Erase/Write (E/W) cycles at
T
20 years non-volatile data retention time (minimum)
Pin and address compatible to the PCx85xxC-2 family
(see also Section 2.1)
2 kV ESD protection (Human Body model).
DD
2048
interface
amb
FEATURES
QUICK REFERENCE DATA
typical 4 A
= 22 C
supply voltage
supply current read
supply current E/W
standby supply current
8-bit CMOS EEPROM with I
8-bit each
2
C-bus (100 kbits/s standard-mode
PARAMETER
2
f
f
V
V
C-bus
SCL
SCL
DD
DD
3
2
The PCF85116-3 is an 16 kbits (2048
Electrically Erasable Programmable Read Only Memory
(EEPROM). By using redundant EEPROM cells it is fault
tolerant to single bit errors. In most cases multi bit errors
are also covered. This feature dramatically increases
reliability compared to conventional EEPROM memories.
Power consumption is low due to the full CMOS
technology used. The programming voltage is generated
on-chip, using a voltage multiplier.
As data bytes are received and transmitted via the serial
I
PCF85116-3 device is required to support all eight blocks
of 256
Timing of the E/W cycle is carried out internally, thus no
external components are required. A write-protection input
at pin 7 (WP) allows disabling of write-commands from the
master by a hardware signal. When pin 7 is HIGH the data
bytes received will not be acknowledged by the
PCF85116-3 and the EEPROM contents are not changed.
2.1
The PCF85116-3 is pin and address compatible to the
PCx85xxC-2 family. The PCF85116-3 covers the whole
address space of 16 kbits; address inputs are no longer
needed. Therefore, pins 1 to 3 are not connected.
The write-protection input is at pin 7.
= 400 kHz; V
= 400 kHz; V
= 2.7 V
= 5.5 V
2
C-bus, a package using eight pins is sufficient. Only one
CONDITIONS
DESCRIPTION
Remark
8-bit each.
DD
DD
= 5.5 V
= 5.5 V
2.7
MIN.
PCF85116-3
Product specification
5.5
1.0
1.0
6
10
8-bit) floating gate
MAX.
V
mA
mA
A
A
UNIT