DAC56 Burr-Brown Corporation, DAC56 Datasheet
DAC56
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DAC56 Summary of contents
Page 1
... Serial data is clocked MSB first into a 16-bit register and then latched into a 16-bit parallel register. The DAC56 is packaged in a 16-pin plastic DIP and 16-pin SOIC. 16-Bit Reference I ...
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... TEMPERATURE RANGE Specification Storage NOTES: (1) Logic input levels are TTL-/CMOS-compatible. (2) FSR means full-scale range and is equivalent 3V) for DAC56 in the V with an active clamp to provide a low impedance for approximately 200ns. (4) All specifications assume +V are connected separately, –V must not be more negative than –V L ® ...
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... Electrostatic discharge can cause damage ranging from per- formance degradation to complete device failure. Burr- Brown Corporation recommends that all integrated circuits be handled and stored using appropriate ESD protection methods. PACKAGE DRAWING (1) NUMBER 180 211 3 +5V 1µF NOTES: = Analog Common = Logic Common DAC56 /+ ® ...
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... FFFF Zero –1LSB –0.000092 H TABLE I. Digital Input to Analog Output Relationship. DIGITAL INPUT CODES The DAC56 accepts serial input data (MSB first) in Binary Two’s Complement form—Refer to Table I for input/output relationships. ® DAC56 POWER SUPPLY CONNECTIONS Power supply decoupling capacitors should be added as shown in the Connection Diagram (Figure 2), for optimum performance and noise rejection ...
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... INPUT TIMING CONSIDERATIONS Figures 4 and 5 refer to the input timing required to interface the inputs of DAC56 to a serial input data stream. Serial data MSB is accepted in Binary Two’s Complement with the MSB being loaded first. Data is clocked in on positive going clock (CLK, pin 5) edges and is latched into the DAC input register on negative going latch enable (LE, pin 6) edges ...