SAA7183A Philips Semiconductors, SAA7183A Datasheet - Page 17

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SAA7183A

Manufacturer Part Number
SAA7183A
Description
Digital Video Encoder EURO-DENC2
Manufacturer
Philips Semiconductors
Datasheet
Philips Semiconductors
I
Table 5 I
Table 6 Explanation of Table 5
Notes
1. X is the read/write control bit; X = logic 0 is order to write; X = logic 1 is order to read, no subaddressing with read.
2. If more than 1 byte DATA is transmitted, then auto-increment of the subaddress is performed.
Slave Receiver
Table 7 Subaddress 26 and 27
Table 8 Subaddress 38 and 39
1996 Oct 02
2
S
Slave address
ACK
Subaddress (note 2)
DATA
--------
P
WSS0 to WSS13
WSSON
GY0 to GY4
GCD0 to GCD4
C-bus format
Digital Video Encoder (EURO-DENC2)
S
DATA BYTE
DATA BYTE
SLAVE ADDRESS
2
C-bus address; see Table 6
PART
Gain luminance of RGB (Cr, Y and Cb) output, ranging from (1
nominal value = 6 (11010b), depending on external application.
Gain Colour Difference of RGB (Cr, Y and Cb) output, ranging from (1 -
Suggested nominal value = 6 (11010b), depending on external application.
LOGIC LEVEL
0
1
ACK
SUBADDRESS
START condition
1 0 0 0 1 0 0 X or 1 0 0 0 1 1 0 X (note 1)
acknowledge, generated by the slave
subaddress byte
data byte
continued data bytes and ACKs
STOP condition
Wide Screen Signalling bits
wide screen signalling output is disabled
wide screen signalling output is enabled
3 to 0 = aspect ratio
7 to 4 = enhanced services
10 to 8 = subtitles
13 to 11 = reserved
ACK
17
DESCRIPTION
DATA 0
DESCRIPTION
DESCRIPTION
ACK
SAA7182A; SAA7183A
--------
16
32
) to (1 +
16
32
Preliminary specification
DATA n
) to (1 +
15
32
). Suggested
15
ACK
32
).
P

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