SAA7284GP Philips Semiconductors, SAA7284GP Datasheet - Page 16

• Manufacturer Part Number: SAA7284GP
• Description: Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems
• Manufacturer: Philips Semiconductors

Philips Semiconductors
Table 11 Explanation of Table 10
I
The bus master can perform single-byte, two-byte, three-byte, four-byte or five-byte read in the order shown in Table 12.
Table 12 Slave transmitter data byte
PONRES
When set HIGH this bit indicates that a power-on reset has
occurred. It is cleared after the status byte has been read.
S/M
This bit gives the stereo or mono broadcast indication.
Set HIGH indicates stereo transmission.
D/S
When HIGH this bit indicates a dual mono broadcast.
VDSP
When this bit is HIGH, it indicates that the digital data
transmission is a sound source. When LOW the
transmission is either data or undefined format.
RSSF
This bit reflects the state of the C4 bit in the NICAM
transmission. When set LOW, the FM sound content does
not match the digital transmission, and switching to FM by
automatic mute or setting MUTE LOW is prevented
(if C4OV = HIGH).
1996 Oct 24
2
START
Slave_addr
X
R
ACK
Data_byte
ACK
STOP
STATUS BYTE 1
ERROR BYTE
AD BYTE 0
AD BYTE 1
STATUS BYTE 2
C slave transmitter register map
Terrestrial digital sound decoder for
conventional intercarrier PLL-IF systems
BYTE
ITEM
PONRES
ERR7
OVW
AD7
D7
C1
I
101101XR
logic 0 when ADSEL = 0; logic 1 when ADSEL = 1
logic 1, I
data byte transmitted from slave receiver
master device negative acknowledge to indicate last byte
I
2
I
2
2
C-bus start condition
C-bus stop condition
C-bus acknowledge condition generated by slave receiver
2
C-bus read from slave transmitter
ERR6
SAD
AD6
S/M
D6
C2
ERR5
AD5
D/S
D5
C3
0
16
OS
When HIGH this bit indicates that the device has both
frame and C0 (16 frame) synchronization.
AM
When HIGH this bit indicates that the automatic mute
function has switched from NICAM to FM. When LOW the
automatic mute function has not activated a switch.
CFC
When LOW this bit indicates a configuration change at the
C0 (16 frame) boundary. It is reset after reading the status
byte.
ERR7
These bits indicate the number of errors occurring in the
previous 128 ms period.
AD7
These bits contain the eight least significant additional
data bits.
VDSP
ERR4
BG/I
AD4
CI1
D4
DESCRIPTION
TO
TO
AD0
ERR0
RSSF
ERR3
AD3
CI2
D3
0
ERR2
AD10
AD2
OS
D2
0
Preliminary specification
ERR1
AD1
AD9
AM
D1
0
SAA7284
ERR0
CFC
AD0
AD8
D0
0