54F NSC [National Semiconductor], 54F Datasheet

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54F

Manufacturer Part Number
54F
Description
Up/Down Binary Counter with Separate Up/Down Clocks
Manufacturer
NSC [National Semiconductor]
Datasheet

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C 1995 National Semiconductor Corporation
54F 74F193 Up Down Binary Counter
with Separate Up Down Clocks
General Description
The ’F193 is an up down modulo-16 binary counter Sepa-
rate Count Up and Count Down Clocks are used and in
either counting mode the circuits operate synchronously
The outputs change state synchronously with the LOW-to-
HIGH transitions on the clock inputs Separate Terminal
Count Up and Terminal Count Down outputs are provided
that are used as the clocks for subsequent stages without
extra logic thus simplifying multi-stage counter designs
Logic Symbols
TRI-STATE is a registered trademark of National Semiconductor Corporation
Note 1 Devices also available in 13 reel Use suffix
Note 2 Military grade device with environmental and burn-in processing Use suffix
74F193PC
74F193SC (Note 1)
74F193SJ (Note 1)
Commercial
IEEE IEC
54F193DM (Note 2)
54F193FM (Note 2)
54F193LM (Note 2)
TL F 9497–1
TL F 9497–4
TL F 9497
Military
e
SCX and SJX
for DIP SOIC and Flatpak
Package
N16E
J16A
M16A
M16D
W16A
E20A
Number
Pin Assignment
Individual preset inputs allow the circuit to be used as a
programmable counter Both the Parallel Load (PL) and the
Master Reset (MR) inputs asynchronously override the
clocks
Features
Y
Connection Diagrams
16-Lead (0 300 Wide) Molded Dual-In-Line
16-Lead Ceramic Dual-In-Line
16-Lead (0 150 Wide) Molded Small Outline JEDEC
16-Lead (0 300 Wide) Molded Small Outline EIAJ
16-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
Guaranteed 4000V minimum ESD protection
e
TL F 9497 – 2
DMQB FMQB and LMQB
Package Description
Pin Assignment
for LCC
RRD-B30M75 Printed in U S A
November 1994
TL F 9497 – 3

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54F Summary of contents

Page 1

... Up Down Binary Counter with Separate Up Down Clocks General Description The ’F193 down modulo-16 binary counter Sepa- rate Count Up and Count Down Clocks are used and in either counting mode the circuits operate synchronously The outputs change state synchronously with the LOW-to- ...

Page 2

... A HIGH signal on the Master Reset input will disable the preset gates override both clock inputs and latch each Q output in the LOW state 54F 74F U L Input I HIGH LOW Output I ...

Page 3

Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays 9497 – 6 ...

Page 4

... Note 2 Either voltage limit or current limit is sufficient to protect inputs DC Electrical Characteristics Symbol Parameter V Input HIGH Voltage IH V Input LOW Voltage IL V Input Clamp Diode Voltage CD V Output HIGH 54F 10 Voltage 74F 10% V 74F Output LOW 54F 10 Voltage 74F 10 Input HIGH 54F IH ...

Page 5

... Mil Min Max Min Max ...

Page 6

... Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows Temperature Range Family 74F Commercial e 54F Military e Device Type Package Code P Plastic DIP e D Ceramic DIP e Flatpak Leadless Chip Carrier (LCC) ...

Page 7

Physical Dimensions inches (millimeters) 20-Lead Ceramic Leadless Chip Carrier (L) 16-Lead Ceramic Dual-In-Line Package (D) NS Package Number E20A NS Package Number J16A 7 ...

Page 8

Physical Dimensions inches (millimeters) (Continued) 16-Lead (0 150 Wide) Molded Small Outline Package JEDEC (S) 16-Lead (0 300 Wide) Molded Small Outline Package EIAJ (SJ) NS Package Number M16A NS Package Number M16D 8 ...

Page 9

Physical Dimensions inches (millimeters) (Continued) 16-Lead (0 300 Wide) Molded Dual-In-Line Package (P) NS Package Number N16E 9 ...

Page 10

Physical Dimensions inches (millimeters) (Continued) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 ...

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