MAX6960 MAXIM [Maxim Integrated Products], MAX6960 Datasheet - Page 18

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MAX6960

Manufacturer Part Number
MAX6960
Description
4-Wire Serially Interfaced 8 x 8 Matrix Graphic LED Drivers
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet

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The global driver devices register should be written
with the total number of MAX6960s interconnected on
the 3-wire interface, minus 1 (Table 13). For the four
panel examples shown in Figures 1 and 2, 24
MAX6960s are used, so the global driver devices regis-
ter should be written with the value 23, or 0x17.
The global driver rows register should be written with
the number of MAX6960s per panel row, minus 1
(Table 14). For the panel examples shown in Figure 1
and Figure 2, there are six MAX6960s per row, so the
global driver rows register should be written with the
value 5.
The values stored in the global driver devices register
and the global driver rows register, together with the C
and Pl bits in the global panel configuration register
(Tables 21 and 22), are used by the 3-wire interface
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
Table 15. Global Panel Configuration Register Format
Table 16. Global Panel Configuration—Shutdown Control (S Data Bit D0) Format
Table 17. Global Panel Configuration—Invert Pixels (IP Data Bit D1) Format
Table 18. Global Panel Configuration—Current Plane (DP0, DP1 Data Bit D2, D3) Format
18
Shutdown
Normal operation
Logic 1 in display memory lights the appropriate
LED (normal logic)
Logic 0 in display memory lights the appropriate
LED (invert logic)
______________________________________________________________________________________
Global panel configuration register
Current display plane is P0
Current display plane is P1
Current display plane is P2
Current display plane is P0
Current display plane is P3
Current display plane is P1
REGISTER
REGISTER
REGISTER
REGISTER
CODE (HEX)
CODE (HEX)
CODE (HEX)
CODE (HEX)
ADDRESS
ADDRESS
ADDRESS
ADDRESS
0x0D
0x0D
0x0D
0x0D
0x0D
0x0D
0x0D
0x0D
0x0D
0x0D
0x0D
configuration engine to reconfigure display memory
addressing among the interconnected MAX6960s.
The configuration register contains eight device set-
tings (Table 15 to Table 22).
Shutdown mode is exited by clearing the S bit in the
global panel configuration register (Table 16). When
the MAX6960 is in shutdown mode, LED driver outputs
ROW1–ROW8 and COL1–COL16 are tri-stated, and
multiplexing is halted. Data in the configuration regis-
ters remains unaltered. For minimum supply current in
shutdown mode, logic inputs should be at GND or V+
potential. Shutdown mode is exited by setting the S bit
in the global panel configuration register.
D7
D7
D7
D7
PI
PI
PI
PI
PI
PI
PI
0
1
0
1
Global Panel Configuration Register
D6
D6
D6
D6
C
C
C
C
C
C
C
C
C
C
C
D5
D5
D5
D5
F
F
F
F
F
F
F
F
F
F
F
REGISTER DATA
REGISTER DATA
REGISTER DATA
REGISTER DATA
D4
D4
D4
D4
R
R
R
R
R
R
R
R
R
R
R
Shutdown Mode (Bit D0)
DP1
DP1
DP1
DP1
DP1
D3
D3
D3
D3
0
0
1
1
1
1
DP0
DP0
DP0
DP0
DP0
D2
D2
D2
D2
0
1
0
0
1
1
D1
D1
D1
D1
IP
IP
IP
IP
IP
IP
IP
IP
IP
0
1
D0
D0
D0
D0
S
S
S
S
S
S
S
S
S
0
1

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