ADC574ASH BURR-BROWN [Burr-Brown Corporation], ADC574ASH Datasheet
ADC574ASH
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ADC574ASH Summary of contents
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... HERMETIC CERAMIC FULLY SPECIFIED FOR OPERATION ON 12V OR 15V SUPPLIES NO MISSING CODES OVER TEMPERATURE +75 C: ADC574AJ and K Grades – +125 C: ADC574ASH, TH DESCRIPTION The ADC574A is a 12-bit successive approximation analog-to-digital converter, utilizing state-of-the-art CMOS and laser-trimmed bipolar die custom-designed Control ...
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SPECIFICATIONS ELECTRICAL + +12V or +15V –12V or –15V, and PARAMETER RESOLUTION INPUTS ANALOG Voltage Ranges: Unipolar Bipolar Impedance +10V, 5V 10V +20V DIGITAL ...
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SPECIFICATIONS (CONT) ELECTRICAL + +12V or +15V –12V or –15V, and PARAMETERS INTERNAL REFERENCE VOLTAGE Voltage (5) Source Current Available for External Loads POWER SUPPLY REQUIREMENTS Voltage: V ...
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... ADC574AKP Plastic DIP ADC574AJH Ceramic DIP ADC574AKH Ceramic DIP ADC574ASH Ceramic DIP ADC574ATH Ceramic DIP NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’ ...
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DISCUSSION OF SPECIFICATIONS LINEARITY ERROR Linearity error is defined as the deviation of actual code transition values from the ideal transition values. Ideal transition values lie on a line drawn through zero (or minus full scale for bipolar operation) and ...
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This change, of course, results in a proportional change in all code transition values (i.e., a gain error). The specification describes the maximum change in ...
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CC Unipolar Full-Scale Offset Adjust Adjust 100k 2 10 Ref In 100 100k 8 Ref Out –V CC 100 12 Bipolar Offset 10V Range 13 Analog Input 14 20V Range 9 Analog Common FIGURE 2. Unipolar ...
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CE CS R/C 12 ...
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SYMBOL Convert Mode t STS Delay from CE DSC t CE Pulse Width HEC Setup time SSC t CS low during CE high HSC t R setup SRC t R/C low during CE high ...
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When A is low, the byte addressed contains the 8MSBs. O When A is high, the byte addressed contains the 4LSBs O from the conversion followed by four logic zeros which have been forced by the control logic. The left-justified ...