XC9515AA01ZL TOREX [Torex Semiconductor], XC9515AA01ZL Datasheet - Page 10

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XC9515AA01ZL

Manufacturer Part Number
XC9515AA01ZL
Description
2 channel Synchronous Step-Down DC/DC Converter with Manual Reset
Manufacturer
TOREX [Torex Semiconductor]
Datasheet
10/21
XC9515 series consists of a reference voltage source, ramp wave circuit, error amplifier, PWM comparator, phase
compensation circuit, output voltage adjustment resistors, P-channel driver transistor, N-channel synchronous switching
transistor, current limit circuit, UVLO circuit and others. The series ICs compare, using the error amplifier, the voltage of the
internal voltage reference source with the feedback voltage from V
compensation is performed on the resulting error amplifier output, to input a signal to the PWM comparator to determine the
turn-on time during PWM operation. The PWM comparator compares, in terms of voltage level, the signal from the error
amplifier with the ramp wave from the ramp wave circuit, and delivers the resulting output to the buffer driver circuit to cause
the Lx pin to output a switching duty cycle. This process is continuously performed to ensure stable output voltage. The
current feedback circuit monitors the P-channel driver transistor current for each switching operation, and modulates the error
amplifier output signal to provide multiple feedback signals. This enables a stable feedback loop even when a low ESR
capacitor, such as a ceramic capacitor, is used, ensuring stable output voltage.
<Reference Voltage Source>
The reference voltage source provides the reference voltage to ensure stable output voltage of the DC/DC converter.
<Ramp Wave Circuit>
The ramp wave circuit determines switching frequency. The frequency is fixed internally at 1MHz. Clock pulses generated
in this circuit are used to produce ramp waveforms needed for PWM operation, and to synchronize all the internal circuits.
<Error Amplifier>
The error amplifier is designed to monitor output voltage. The amplifier compares the reference voltage with the feedback
voltage divided by the internal split resistor, R
voltage of the error amplifier increases. The gain and frequency characteristics of the error amplifier output are fixed
internally to deliver an optimized signal to the mixer.
<Current Limit>
The current limiter circuit of the XC9515 series monitors the current flowing through the P-channel MOS driver transistor
connected to the Lx pin, and features a combination of the current limit mode and the latch mode.
■OPERATIONAL EXPLANATION
①When the driver current is greater than a specific level (peak value of coil current), the current limit function operates to off
③At the next pulse, the driver transistor is turned on. However, the transistor is immediately turned off in the case of an
②When the driver transistor is turned off, the limiter circuit is then released from the current limit detection state.
④When the over current is eliminated, the IC resumes its normal operation.
XC9515
over current state.
The IC waits for the over current state to end by repeating the steps ① to ③. If an over current state continues for a few
ms and the above three steps are repeatedly performed, the IC performs the function of latching the OFF state of the
driver transistor. Both two DC/DC blocks stop operations when either CH1 or CH2 of protection circuit is activated. At
this time, both Lx1 and Lx2 become high impedance. Once the IC is in latch mode, operations can be resumed by either
turning the IC off after letting EN1 and EN2 pins down to low level, or by restoring power. For restoring power, the IC
should be turned off after P_V
can be released from the current limit detection state because of the circuit’s noise. Also, depending on the state of the
PC Board, latch time may become longer and latch operation may not work. In order to avoid the effect of noise, the
board should be laid out so that capacitors are placed as close to the chip as possible.
the pulses from the Lx pin at any giving timing.
Series
DD1
and P_V
Limit < # ms
FB1
DD2
and R
voltages drop below the low level of EN1 and EN2 pin.)The latch operation
FB2
. When a voltage lower than the reference is fed back, the output
Limit < # ms
OUT
pin through split resistors, R
FB1
and R
FB2
. Phase

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