PIC16F MICROCHIP [Microchip Technology], PIC16F Datasheet
PIC16F
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PIC16F Summary of contents
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... PIC16F1827 • PIC16LF1827 • PIC16F1828 • PIC16LF1828 • PIC16F1829 • PIC16LF1829 1.0 OVERVIEW The PIC16F/LF182X and PIC12F/LF1822 devices can be programmed using either the high-voltage In-Circuit Serial Programming™ (ICSP™) method or the low- voltage ICSP™ method. 1.1 Hardware Requirements 1.1.1 HIGH-VOLTAGE ICSP PROGRAMMING In High-Voltage ICSP™ ...
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... Legend Input Output Power Note 1: In the PIC12F/LF1822 and PIC16F/LF182X, the programming high voltage is internally generated. To activate the Program/Verify mode, high voltage needs to be applied to MCLR input. Since the MCLR is used for a level source, MCLR does not draw any significant current. ...
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... PIC16F/LF182X/PIC12F/LF1822 2.0 DEVICE PINOUTS The pin diagrams for the PIC16F/LF182X and PIC12F/ LF1822 family are shown in Figure 2-1 through Figure 2-9. The pins that are required for programming are listed in Table 1-1 and shown in bold lettering in the pin diagrams. FIGURE 2-1: 18-PIN DIAGRAM FOR PIC16F1826/1827 AND ...
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... RA5 1 12 RA4 2 11 PIC16F/LF1823/ 1824/1825 RA3/MCLR RC5 FIGURE 2-9: 20-PIN DIAGRAM FOR PIC16F/LF1828 AND PIC16F/LF1829 QFN 4x4 RA3/MCLR/V RC5 RC4 RC3 RC6 DS41390C-page 4 FIGURE 2-8: PDIP, SOIC, TSSOP RA5 RA4 RA3/MCLR/V PP RC5 RC4 RC3 RC6 ...
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... PIC16F/LF182X PIC12F/LF1822 devices is broken into two sections: program memory and configuration memory. Only the size of the program memory changes between devices, the configuration memory remains the same. FIGURE 3-1: PIC12F1822/PIC12LF1822, PIC16F1823/PIC16LF1823, PIC16F1826/PIC16LF1826 PROGRAM MEMORY MAPPING User ID Location 8000h User ID Location 8001h User ID Location ...
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... PIC16F/LF182X/PIC12F/LF1822 FIGURE 3-2: PIC16F/LF1827, PIC16F/LF1824 AND PIC16F/LF1828 PROGRAM MEMORY MAPPING User ID Location 8000h User ID Location 8001h User ID Location 8002h User ID Location 8003h Reserved 8004h Reserved 8005h 8006h Device ID 8007h Configuration Word 1 8008h Configuration Word 2 Calibration Word 1 8009h 800Ah Calibration Word 2 800Bh-81FFh Reserved ...
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... PIC16F/LF182X/PIC12F/LF1822 FIGURE 3-3: PIC16F/LF1825 AND PIC16F/LF1829 PROGRAM MEMORY MAPPING User ID Location 8000h User ID Location 8001h User ID Location 8002h User ID Location 8003h Reserved 8004h Reserved 8005h 8006h Device ID 8007h Configuration Word 1 8008h Configuration Word 2 Calibration Word 1 8009h 800Ah Calibration Word 2 800Bh-81FFh Reserved 2010 Microchip Technology Inc. ...
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... PIC16F/LF182X/PIC12F/LF1822 3.1 User ID Location A user may store identification information (user ID) in four designated locations. The user ID locations are mapped to 8000h-8003h. Each location is 14 bits in length. Code protection has no effect on these memory locations. Each location may be read with code protection enabled or disabled. ® ...
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... DEVICE PIC16F1826 PIC16F1827 PIC16LF1826 PIC16LF1827 PIC16F1823 PIC16LF1823 PIC12F1822 PIC12LF1822 PIC16F1824 PIC16LF1824 PIC16F1825 PIC16LF1825 PIC16F1828 PIC16LF1828 PIC16F1829 PIC16LF1829 3.3 Configuration Words There are two Configuration Words, Configuration Word 1 (8007h) and Configuration Word 2 (8008h). The individual bits within these Configuration Words are used to enable or disable device functions such as the Brown-out Reset, code protection and Power-up Timer ...
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... PIC16F/LF182X/PIC12F/LF1822 REGISTER 3-2: CONFIGURATION WORD 1 R/P-1 R/P-1 FCMEN IESO CLKOUTEN bit 13 R/P-1 R/P-1 MCLRE PWRTE bit 6 Legend Writable bit R = Readable bit ‘1’ = Bit is set -n = Value at POR U = Unimplemented bit, read as ‘0’ bit 13 FCMEN: Fail-Safe Clock Monitor Enable bit 1 = Fail-Safe Clock Monitor is enabled 0 = Fail-Safe Clock Monitor is disabled ...
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... EECON control 01 = 000h to 3FFh write-protected, 400h to 7FFh may be modified by EECON control 00 = 000h to 7FFh write-protected, no addresses may be modified by EECON control 4 kW Flash memory (PIC16F1827/PIC16LF1827 Write protection off 10 = 000h to 1FFh write-protected, 200h to FFFh may be modified by EECON control ...
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... ICSPDAT and 4.2 Low-Voltage Programming (LVP) Mode The Low-Voltage Programming mode allows the PIC16F/LF182X and PIC12F/LF1822 devices to be ICSPDAT and programmed using V When the LVP bit of Configuration Word 2 register is set to ‘1’, the low-voltage ICSP programming entry is enabled. To disable the Low-Voltage ICSP mode, the ...
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... PIC16F/LF182X/PIC12F/LF1822 4.3 Program/Verify Commands The PIC16F/LF182X and PIC12F/LF1822 implement 13 programming commands; each six bits in length. The commands are summarized in Table 4-1. Commands that have data associated with them are specified to have a minimum delay of T command and the data. After this delay 16 clocks are required to either clock in or clock out the 14-bit data word ...
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... PIC16F/LF182X/PIC12F/LF1822 4.3.1 LOAD CONFIGURATION The Load Configuration command is used to access the configuration memory (User Configuration Words, Calibration Words). The Load Configuration command sets the address to 8000h and loads the data latches with one word of data (see Figure 4-1). FIGURE 4-1: LOAD CONFIGURATION ICSPCLK ...
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... PIC16F/LF182X/PIC12F/LF1822 4.3.3 LOAD DATA FOR DATA MEMORY The Load Data for Data Memory command will load a 14-bit “data word” when 16 cycles are applied. However, the data memory is only 8 bits wide and thus, only the first 8 bits of data after the Start bit will be programmed into the data memory ...
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... PIC16F/LF182X/PIC12F/LF1822 4.3.5 READ DATA FROM DATA MEMORY The Read Data from Data Memory command will transmit data bits out of the data memory starting with the second rising edge of the clock input. The ICSPDAT pin will go into Output mode on the second rising edge, and it will revert to Input mode (high-impedance) after the 16th rising edge ...
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... PIC16F/LF182X/PIC12F/LF1822 4.3.7 RESET ADDRESS The Reset Address command will reset the address to 0000h, regardless of the current value. The address is used in program memory or the configuration memory. FIGURE 4-7: RESET ADDRESS 1 2 ICSPCLK 0 1 ICSPDAT Address 4.3.8 BEGIN INTERNALLY TIMED PROGRAMMING A Load Configuration or Load Data for Program ...
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... PIC16F/LF182X/PIC12F/LF1822 4.3.9 BEGIN EXTERNALLY TIMED PROGRAMMING A Load Configuration, Load Data for Program Memory or Load Data for Data Memory command must be given before every Begin Programming command. Program- ming of the addressed memory will begin after this command is received. To complete the programming the End Externally Timed Programming command ...
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... PIC16F/LF182X/PIC12F/LF1822 4.3.11 BULK ERASE PROGRAM MEMORY The Bulk Erase Program Memory command performs two different functions dependent on the current state of the address. Address 0000h-7FFFh: Program Memory is erased Configuration Words are erased If CPD = 0, Data Memory is erased Address 8000h-8008h: Program Memory is erased Configuration Words are erased ...
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... After receiving the Row Erase Program Memory command the erase will not complete until the time interval has expired. ERAR TABLE 4-2: PROGRAMMING ROW SIZE AND LATCHES Devices PIC16F1826/1827 PIC12F1822/16F1823 PIC16F1824/1825 PIC16F1828/1829 FIGURE 4-13: ROW ERASE PROGRAM MEMORY 1 ICSPCLK ICSPDAT 1 DS41390C-page 20 PC Row Size <15:5> ...
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... Timed Programming command is given will determine which location(s) in memory are written. Writes cannot cross the physical boundary. For example, with the PIC16F1827, attempting to write from address 0002h- 0009h will result in data being written to 0008h-000Fh. If more than the maximum number of data latches are ...
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... PIC16F/LF182X/PIC12F/LF1822 FIGURE 5-1: DEVICE PROGRAM/VERIFY FLOWCHART Note 1: See Figure 5-2. 2: See Figure 5-5. 3: See Figure 5-6. DS41390C-page 22 Start Enter Programming Mode Bulk Erase Device Write Program (1) Memory Write User IDs Write Data (3) Memory Verify Program Memory Verify User IDs Verify Data Memory Write Configuration (2) Words ...
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... PIC16F/LF182X/PIC12F/LF1822 FIGURE 5-2: PROGRAM MEMORY FLOWCHART Increment Address Command Note 1: This step is optional if device has already been erased or has not been previously programmed the device is code-protected or must be completely erased, then Bulk Erase device per Figure 5-8. 3: See Figure 5-3 or Figure 5-4. 2010 Microchip Technology Inc. ...
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... PIC16F/LF182X/PIC12F/LF1822 FIGURE 5-3: ONE-WORD PROGRAM CYCLE (Internally timed) DS41390C-page 24 Program Cycle Load Data for Program Memory Begin Begin Programming Programming Command Command (Externally timed) Wait T Wait T PEXT PINT End Programming Command Wait T DIS Advance Information 2010 Microchip Technology Inc. ...
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... PIC16F/LF182X/PIC12F/LF1822 FIGURE 5-4: MULTIPLE-WORD PROGRAM CYCLE 2010 Microchip Technology Inc. Program Cycle Load Data Latch 1 for Program Memory Increment Address Command Load Data Latch 2 for Program Memory Increment Address Command Load Data Latch n for Program Memory Begin Begin Programming Programming Command ...
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... PIC16F/LF182X/PIC12F/LF1822 FIGURE 5-5: CONFIGURATION MEMORY PROGRAM FLOWCHART Start Load Configuration Bulk Erase Program (1) Memory One-word (2) Program Cycle (User ID) Read Data From Program Memory Command Data Correct? Yes Increment Address Command No Address = 8004h? Note 1: This step is optional if device is erased or not previously programmed. 2: See Figure 5-3. ...
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... PIC16F/LF182X/PIC12F/LF1822 FIGURE 5-6: DATA MEMORY PROGRAM FLOWCHART Increment Address Command Note 1: See Figure 5-7. 2010 Microchip Technology Inc. Start Bulk Erase Data Memory Data (1) Program Cycle Read Data From Data Memory Command Report No Programming Data Correct? Failure Yes No All Locations Done? Yes ...
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... PIC16F/LF182X/PIC12F/LF1822 FIGURE 5-7: DATA MEMORY PROGRAM CYCLE FIGURE 5-8: ERASE FLOWCHART Note: This sequence does not erase the Calibration Words. DS41390C-page 28 Program Cycle Load Data for Data Memory Begin Begin Programming Programming Command Command (Internally timed) (Externally timed) Wait T Wait T PINT PEXT End ...
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... Intel LSB first, MSB second. Because there are two bytes per word, the addresses in the hex file are 2x the address in program memory. (Example: Configuration Word 1 is stored at 8007h on the PIC16F/LF182X and PIC12F/LF1822. In the hex file this will be referenced as 1000Eh-1000Fh). 7.1 ...
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... PROGRAM CODE PROTECTION DISABLED With the program code protection disabled, the checksum is computed by reading the contents of the PIC16F/LF182X and PIC12F/LF1822 program memory locations and adding up the program memory data starting at address 0000h the maximum user addressable location. Any Carry bit exceeding 16 bits are ignored ...
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... The Least Significant nibble of each User ID is used to create a 16-bit value. The masked value of User ID EXAMPLE 7-3: CHECKSUM COMPUTED WITH PROGRAM CODE PROTECTION ENABLED PIC16F1827, BLANK DEVICE PIC16F1827 Configuration Word 1 Configuration Word 1 mask Configuration Word 2 Configuration Word 2 mask ...
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... ERAR DS41390C-page 32 Standard Operating Conditions (unless otherwise stated) Operating Temperature Min. Typ. Supply Voltages and Currents PIC12F1822 2.1 — PIC16F182X PIC12LF1822 2.1 — PIC16LF182X PIC12F1822 2.7 — PIC16F182X PIC12LF1822 2.7 — PIC16LF182X — — — — — — 8.0 — — — ) input high PP 0.8 V — ...
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... PIC16F/LF182X/PIC12F/LF1822 TABLE 8-1: AC/DC CHARACTERISTICS TIMING REQUIREMENTS FOR PROGRAM/VERIFY AC/DC CHARACTERISTICS Sym. Characteristics Internally timed programming operation time T PINT T Externally timed programming pulse PEXT Time delay from program to compare T DIS (HV discharge time) T Time delay when exiting Program/Verify mode EXIT 8.1 AC Timing Diagrams FIGURE 8-1: PROGRAMMING MODE ENTRY – ...
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... PIC16F/LF182X/PIC12F/LF1822 FIGURE 8-5: CLOCK AND DATA TIMING T T CKH CKL ICSPCLK ICSPDAT as input T CO ICSPDAT as output T LZD ICSPDAT from input T HZD to output ICSPDAT from output to input FIGURE 8-6: WRITE COMMAND-PAYLOAD TIMING 1 2 ICSPCLK X X ICSPDAT DS41390C-page 34 T DLY LSb ...
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... PIC16F/LF182X/PIC12F/LF1822 FIGURE 8-7: READ COMMAND-PAYLOAD TIMING 1 2 ICSPCLK X X ICSPDAT (from Programmer) ICSPDAT (from Device) FIGURE 8-8: LVP ENTRY (POWERING UP MCLR T ENTS T ENTH T CKH ICSPCLK LSb of Pattern ICSPDAT 0 2010 Microchip Technology Inc. T DLY Command 33 clocks T CKL ...
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... PIC16F/LF182X/PIC12F/LF1822 FIGURE 8-9: LVP ENTRY (POWERED MCLR T ENTH T CKH ICSPCLK LSb of Pattern ICSPDAT 0 Note 1: Sequence matching can start with no edge on MCLR first. DS41390C-page 36 33 Clocks T CKL MSb of Pattern 1 2 ... 31 Advance Information 2010 Microchip Technology Inc. ...
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... PIC16F/LF182X/PIC12F/LF1822 APPENDIX A: REVISION HISTORY Revision A (06/2009) Original release of this document. Revision B (10/2009) Added PIC12F/LF1822 and PIC16F/LF1823 devices. Revision C (03/2010) Added PIC12F/LF1824, PIC16F/LF1825, LF1828 and PIC16F/LF1829 devices; Added Figure 2-8, Figure 2-9 and Figure 3-3. 2010 Microchip Technology Inc. PIC16F/ Advance Information DS41390C-page 37 ...
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... PIC16F/LF182X/PIC12F/LF1822 NOTES: DS41390C-page 38 Advance Information 2010 Microchip Technology Inc. ...
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Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families ...
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W ORLDWIDE AMERICAS ASIA/PACIFIC Corporate Office Asia Pacific Office 2355 West Chandler Blvd. Suites 3707-14, 37th Floor Chandler, AZ 85224-6199 Tower 6, The Gateway Tel: 480-792-7200 Harbour City, Kowloon Fax: 480-792-7277 Hong Kong Technical Support: Tel: 852-2401-1200 http://support.microchip.com Fax: 852-2401-3431 ...