LMP7312MA NSC [National Semiconductor], LMP7312MA Datasheet - Page 16

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LMP7312MA

Manufacturer Part Number
LMP7312MA
Description
Precision SPI-Programmable AFE with Differential/Single-Ended Input/Output
Manufacturer
NSC [National Semiconductor]
Datasheet

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Gain_0, Gain_1 bit: Gain Values
Different gains are available in Attenuation Mode or Amplifi-
cation Mode according to the following Gain Table.
EN_CL bit: Enable Amplification Mode
This register selects which input pair is processed.
NULL_SW bit: Input Offset Nulling Switch Mode
This register selects a mode in which the amplifier is not pro-
cessing any input but it is configured in unity gain to allow
system level amplifier offset calibration. The Nulling Switch
mode is available in both single ended and fully differential
output mode. The LMP7312 in Nulling Switch and fully differ-
ential mode has he following configuration.
NULL_SW
EN_CL
Gain_1
0
1
0
1
FIGURE 4. LMP7312 in Nulling Switch Mode
0
0
1
1
1
1
Amplification
Attenuation
Nulling Switch
Gain_0
Mode
Mode
Mode
Operation
Normal
Mode
0
1
0
1
0
1
Mode
Mode
EN_CL
±V
through the 104.16k input
resistors
±IN inputs are processed
through
resistors
0
0
0
0
1
1
±V
processed
EN_CL register setting.
Enables to evaluate the offset
of the internal amplifier for
system level calibration
IN
IN
inputs are processed
and ±IN inputs are
Description
Gain Value (V/V)
Description
the
depending
0.096
0.192
0.384
0.768
40k
1
2
input
30075507
on
16
In this condition at the Output pins is possible to measure the
input voltage offset of the op-amp:
Hi_Z bit: High Impedance
In this mode both outputs +V
LMP7312 are in tri-state
Output Mode
Differential
Single-Ended
HI_Z
0
1
FIGURE 5. LMP7312 in High Impedance Mode
High Impedance
Operation Mode
Normal
Mode
Mode
V
CM_out
Figure
V
+V
R
+V
OUT
Description
The LMP7312 is configured
according to value of the
other 4 bits of the register.
The LMP7312 output is in
high impedance
+V
OS
5.
OS
OUT
/2
and -V
V
CM_out
−V
OUT
OUT
V
/V
R
-V
/V
R
OS
R
of the
30075560
/2

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