PCI9030-AA60BIF PLX [PLX Technology], PCI9030-AA60BIF Datasheet - Page 2

• Manufacturer Part Number: PCI9030-AA60BIF
• Manufacturer: PLX [PLX Technology]

P C I 9 0 3 0 S M A R T a r g e t I / O
A c c e l e r a t o r
Only the PCI 9030 has SMARTarget tech-
nology, a set of advanced features which
go far beyond the minimum to provide
the best possible performance and flexi-
bility to simplify the design. A basic target
design is one thing, but a SMARTarget
design is much more.
SMARTarget Performance Features:
PCI v2.2 Compliant 32-bit, 33MHz
Target Interface Chip enabling PCI Burst
Transfers up to 132Mbytes/second.
Up to 60MHz Local Bus operation
enabling burst transfers up to
240Mbytes/second
PCI Target Read Ahead Mode. The
PCI 9030 will prefetch a programmable
amount of data from the local bus.
The prefetched data can then be burst
transferred on the PCI bus from the PCI
9030 internal PCI Target Read FIFO. The
prefetch size can be programmed to
match the PCI master burst length or can
be used as PCI Target Read Ahead mode
data. This feature allows for increased
bandwidth and reduced read latency.
Figure 1.
Typical PCI Target
Adapter Card
PCI Target Programmable Burst. The PCI
9030 may be programmed for several
burst lengths, including unlimited burst.
This allows for maximum transfer rates
on both the PCI and local bus.
PCI Target Delayed Write. The PCI 9030
supports PCI Target Delayed Write mode
where the PCI Target Write data is post-
poned in the PCI Target Write FIFO to
allow uninterrupted burst transactions
on the Local bus. This allows for a higher
throughput for conditions in which the
PCI clock frequency is slower than the
Local clock frequency or when Local bus
bursting is desirable.
SMARTarget Flexibility Features
Posted Memory Writes. A PCI memory
write can be posted to the PCI 9030 for
later transfer to the Local bus. This
allows for maximum PCI performance
and avoids potential deadlock situations.
Programmable Local Bus operates up
to 60MHz and supports both non-
multiplexed and multiplexed 32-bit
address/data protocol, and Dynamic
Local Bus width control allowing slave
accesses of 8-,16- or 32-bit devices.
Supports 5 PCI to Local Address
spaces. These spaces (Space 0,1,2,3 and
Expansion ROM Spaces) allow a PCI
Bus Master to access the local memory
spaces with individually programmable
wait states, bus width, and burst
capabilities.
The PCI 9030 has 9 programmable
General Purpose I/Os which may
be used for a variety of purposes.
Four programmable Chip
selects eliminate decode logic.
CompactPCI Hot Swap Ready
Supports Automatic on-the-fly Big
Endian and Little Endian conversion
for all operations and data types.
Interrupt Generator can assert PCI inter-
rupts from external and internal sources.
Fully supports the Vital Product Data
(VPD) PCI v2.2 extension including New
Capabilities Structure. Provides an alter-
nate access method for user or system
defined parameters or configuration data.
Figure 2.
Typical CompactPCI
Hot Swap Adapter Card