HCPL-314J-300 HP [Agilent(Hewlett-Packard)], HCPL-314J-300 Datasheet
HCPL-314J-300
Related parts for HCPL-314J-300
HCPL-314J-300 Summary of contents
Page 1
... A 0.1 µF bypass capacitor must be connected between pins V CAUTION advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. Description The HCPL-J314 family of devices consists of an AlGaAs LED optically coupled to an integrated circuit with a power output stage. ...
Page 2
... Remarks: The notation “#” is used for existing products, while (new) products launched since 15th July 2001 and lead free option will use “-” Number of Channels HCPL-J314 1 HCPL-314J 2 No option = Standard DIP package, 50 per tube. 300 = Gull Wing Surface Mount Option, 50 per tube. 500 = Tape and Reel Packaging Option. ...
Page 3
... HCPL-J314 Package Outline Drawings Standard DIP Package 9.80 ± 0.25 (0.386 ± 0.010 HCPL-J314 YYWW 1.19 (0.047) MAX. 3.56 ± 0.13 (0.140 ± 0.005) 1.080 ± 0.320 (0.043 ± 0.013) Gull Wing Surface Mount Option 300 9.80 ± 0.25 (0.386 ± 0.010 HCPL-J314 YYWW 1 2 MOLDED 1 ...
Page 4
... PEAK TEMPERATURE t p 20-40 SEC. RAMP-DOWN 6 °C/SEC. MAX 150 SEC. 4 Regulatory Information The HCPL-J314 has been approved by the following organizations: IEC/EN/DIN EN 60747-5-2 PEAK Approved under: TEMP. 230°C IEC 60747-5-2:1997 + A1:2002 EN 60747-5-2:2001 + A1:2002 DIN EN 60747-5-2 (VDE 0884 ...
Page 5
IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Description Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage ≤ 150 V rms for rated mains voltage ≤ 300 V rms for rated mains voltage ≤ 600 V rms Climatic Classification ...
Page 6
... Reverse Input Voltage “High” Peak Output Current “Low” Peak Output Current Supply Voltage Output Voltage Output Power Dissipation Input Power Dissipation Lead Solder Temperature Solder Reflow Temperature Profile Symbol HCPL-J314 L(101) 7.4 L(102) 8.0 0.5 CTI >175 IIIa Symbol Min. ...
Page 7
Recommended Operating Conditions Parameter Power Supply Input Current (ON) Input Voltage (OFF) Operating Temperature Electrical Specifications (DC) Over recommended operating conditions unless otherwise specified. Parameter Symbol High Level Output Current Low Level Output Current High Level Output Voltage Low Level ...
Page 8
... OH amps. 7. Maximum pulse width = 1 ms, maximum duty cycle = 20 accordance with UL 1577, each HCPL-J314 optocoupler is proof tested by applying an insulation test voltage ≥ 5000 V 1 second (leakage detection current limit I (method B) shown in the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table, if applicable. 9. Device considered a two-terminal device: pins on input side shorted together and pins on output side shorted together. ...
Page 9
T – TEMPERATURE – °C A Figure 1. V vs. Temperature. OH 0.44 0.43 0.42 0.41 0.40 0.39 -50 - 100 125 ...
Page 10
T PLH T PHL – SUPPLY VOLTAGE – Figure 10. Propagation Delay vs 400 350 T PLH 300 T PHL 250 200 0 50 ...
Page 11
500 Ω + – 10 KHz 50% DUTY 3 CYCLE 4 Figure 17. Propagation Delay Test Circuit and Waveforms – ...
Page 12
... CONTROL 3 INPUT 74XXX 4 OPEN COLLECTOR Figure 19. Recommended LED Drive and Application Circuit for HCPL-J314. eliminate the need for negative IGBT gate drive in many applications as shown in Figure 19. Care should be taken with such a PC board design to avoid routing the IGBT collector or emitter traces close to the ...
Page 13
... V – 0. Ω The V value the previous equation is the V OL current of 0.6A. (See Figure 6). Step 2: Check the HCPL-J314 power dissipation and increase Rg if necessary. The HCPL-J314 total power dissipation (P sum of the emitter power (P ) and the output power ( ...
Page 14
C LEDP LEDN 4 5 Figure 21. Optocoupler Input to Output Capacitance Model for Unshielded Optocouplers LEDP LEDP SAT – LEDN 4 SHIELD ...
Page 15
... Figure 27. The maximum dead time for the HCPL-J314 is 1 µs (= 0.5 µs - (-0.5 µs)) over the operating temperature range of -40°C to 100°C. Note that the propagation delays used to calculate PDD and dead ...
Page 16
I LED1 V OUT1 Q2 OFF V OUT2 I LED2 t PHL MAX PDD* MAX = (t *PDD = PROPAGATION DELAY DIFFERENCE NOTE: FOR PDD CALCULATIONS THE PROPAGATION DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS. Figure 26. ...
Page 17
For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (916) 788-6763 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6756 ...