74LCXZ245_05 FAIRCHILD [Fairchild Semiconductor], 74LCXZ245_05 Datasheet

74LCXZ245_05

Manufacturer Part Number

74LCXZ245_05

Description

Low Voltage Bidirectional Transceiver with 5V Tolerant Inputs and Outputs

Manufacturer

FAIRCHILD [Fairchild Semiconductor]

Datasheet

1.74LCXZ245_05.pdf (10 pages)

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74LCXZ245WM

74LCXZ245SJ

74LCXZ245MSA

74LCXZ245MTC

74LCXZ245

Low Voltage Bidirectional Transceiver

with 5V Tolerant Inputs and Outputs

General Description

The 74LCXZ245 contains eight non-inverting bidirectional

buffers with 3-STATE outputs and is intended for bus ori-

ented applications. The device is designed for low voltage

(2.5V and 3.3V) V

ing to a 5V signal environment. The T/R input determines

the direction of data flow through the device. The OE input

disables both the A and B ports by placing them in a high

impedance state.

The 74LCXZ245 is fabricated with an advanced CMOS

technology to achieve high speed operation while maintain-

ing CMOS low power dissipation. When V

and 1.5V, the 74LCXZ245 is on the high impedance state

during power up or power down. This places the outputs in

the high impedance (Z) state preventing intermittent low

impedance loading or glitching in bus oriented applications.

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Logic Symbol

Pin Descriptions

Order Number

T/R

Pin Names

–A

–B

Output Enable Input

Transmit/Receive Input

Side A Inputs or 3-STATE Outputs

Side B Inputs or 3-STATE Outputs

Package Number

applications with capability of interfac-

MSA20

MTC20

M20D

M20B

Description

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

is between 0V

DS500362

Features

Note 1: To ensure the high-impedance state during power up or down, OE

should be tied to V

resistor is determined by the current-sourcing capability of the driver.

Connection Diagram

5V tolerant inputs and outputs

2.3V–3.6V V

7.0 ns t

Power down high impedance inputs and outputs

Supports live insertion/withdrawal (Note 1)

Implements patented noise/EMI reduction circuitry

Latch-up performance exceeds 500 mA

ESD performance:

Human body model

Machine model

24 mA output drive (V

Package Description

max (V

through a pull-up resistor: the minimum value or the

specifications provided

200V

2000V

3.3V), 10

3.0V)

October 2000

Revised March 2005

A I

www.fairchildsemi.com

max

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74LCXZ245_05 Summary of contents

Page 1

Low Voltage Bidirectional Transceiver with 5V Tolerant Inputs and Outputs General Description The 74LCXZ245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus ori- ented applications. The device is designed for low voltage (2.5V and ...

Page 2

Truth Table Inputs OE T HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance Note 2: Unused bus terminals during HIGH Z State must be held HIGH or LOW. Logic Diagram ...

Page 3

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply ...

Page 4

DC Electrical Characteristics Symbol Parameter I Quiescent Supply Current Increase in I per Input CC CC Note 6: Outputs disabled or 3-STATE only. AC Electrical Characteristics Symbol Parameter t Propagation Delay PHL ...

Page 5

AC LOADING and WAVEFORMS FIGURE 1. AC Test Circuit (C Test t PLH t PZL t PZH Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t rec 3-STATE Output Low Enable and Disable Times for Logic (Input ...

Page 6

Schematic Diagram Generic for LCX Family www.fairchildsemi.com 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide Package Number MSA20 9 www.fairchildsemi.com ...

Page 10

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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