DM9601E ETC1 [List of Unclassifed Manufacturers], DM9601E Datasheet - Page 12

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DM9601E

Manufacturer Part Number
DM9601E
Description
USB Ethernet MAC Controller with Intergrated 10/100 PHY
Manufacturer
ETC1 [List of Unclassifed Manufacturers]
Datasheet

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8. Interface 0 Configuration
8.1 Endpoint 1
8.2 Endpoint 2
8.3 Endpoint 3
12
Data Format
Data Format
Data Format
Offset
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
Type: Bulk In
Packet Load: 64-byte
When host is accessing EP1.
Fist byte
Second byte
Third byte
The others
Type: Bulk Out
Packet Load: 64-byte
When host is accessing EP2.
First byte
Second byte
The others
Type: Interrupt In
Packet Load: 8-byte
When host accessing EP3.
If IN-FIFO is full, device will send 64-byte data.
If IN-FIFO isn’t full and Ethernet packet isn’t end, device will send a NAK.
If IN-FIFO isn’t full and Ethernet packet is end, device will send the surplus data in IN-FIFO.
If OUT-FIFO is empty, host sends data, device responds to ACK.
If OUT-FIFO isn’t empty, host sends data, device responds to NAK.
If host sends data less then 64-byte or zero byte, it means Ethernet packet ends.
If there is no interrupt condition, device responds to NAK.
If interrupt condition, device will send content back to host.
ROCR
Name
TSR1
TSR2
GPR
NSR
RSR
RXC
TXC
: Packet Status
: Packet byte count low
: Packet byte count high
: Packet
: Packet byte count low
: Packet byte count high
: Packet
Received Overflow Counter Register
General Purpose Register
Received Packet Counter
Transmit Packet Counter
Network Status Register
TX Status Register1
TX Status Register2
RX Status Register
Description
USB to Ethernet MAC Controller with Integrated 10/100 PHY
Version: DM9601-DS-F01
DM9601
June 22, 2002
Final

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