93LC56A-I/SM MICROCHIP [Microchip Technology], 93LC56A-I/SM Datasheet - Page 7

no-image

93LC56A-I/SM

Manufacturer Part Number
93LC56A-I/SM
Description
2K 2.5V Microwave Serial EEPROM
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
3.8
The WRITE instruction is followed by 8 bits (93LC56A)
or 16 bits (93LC56B) of data which are written into the
specified address. After the last data bit is put on the DI
pin, the falling edge of CS initiates the self-timed auto-
erase and programming cycle.
The DO pin indicates the READY/BUSY status of the
device if CS is brought high after a minimum of 250 ns
low (T
DO at logical “0” indicates that programming is still in
progress. DO at logical “1” indicates that the register at
the specified address has been written with the data
specified and the device is ready for another instruc-
tion.
FIGURE 3-7:
FIGURE 3-8:
CLK
1997 Microchip Technology Inc.
CLK
DO
CS
DO
Guaranteed at Vcc = 4.5V to +6.0V.
DI
CS
DI
CSL
WRITE
) and before the entire write cycle is complete.
1
WRITE TIMING
1
WRAL TIMING
HIGH-Z
HIGH-Z
0
0
0
1
0
An
1
•••
A0
X
Preliminary
•••
Dx
X
•••
3.9
The Write All (WRAL) instruction will write the entire
memory array with the data specified in the command.
The WRAL cycle is completely self-timed and com-
mences at the falling edge of the CS. Clocking of the
CLK pin is not necessary after the device has entered
the WRAL cycle. The WRAL command does include an
automatic ERAL cycle for the device. Therefore, the
WRAL instruction does not require an ERAL instruction
but the chip must be in the EWEN status.
The DO pin indicates the READY/BUSY status of the
device if CS is brought high after a minimum of 250 ns
low (T
Dx
D0
CSL
T
•••
CSL
Write All (WRAL)
).
D0
Twc
BUSY
T
T
CSL
SV
T
WL
BUSY
93LC56A/B
T
READY
SV
READY
HIGH-Z
DS21208A-page 7
HIGH-Z
T
CZ
T
CZ

Related parts for 93LC56A-I/SM