AT24C02A ATMEL [ATMEL Corporation], AT24C02A Datasheet
AT24C02A
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AT24C02A Summary of contents
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... The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C02A/04A/08A is available in space saving 8-pin PDIP, 8-pin, 14-pin SOIC, and 8-pin TSSOP packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 5 ...
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... DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that are hard wired for the AT24C02A. As many as eight 2K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). AT24C02A/04A/08A ...
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... V max are reference only and are not tested Memory Organization AT24C02A, 2K SERIAL EEPROM: Internally organized with 256 pages of 1-byte each, the 2K requires an 8 bit data word address for random word addressing. AT24C04A, 4K SERIAL EEPROM: The 4K is internally 24C08A organized with 256 pages of 2-bytes each ...
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... The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle. STANDBY MODE: The AT24C02A/04A/08A features a low power standby mode which is enabled: (a) upon power-up and (b) after the receipt of the STOP bit and the completion of any internal operations. ...
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Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O) Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O) SCL SDA 8th BIT WORD n Note: 1. The write cycle time t WR clear/write cycle. ACK STOP CONDITION is the ...
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... Data Validity Start and Stop Definition Output Acknowledge AT24C02A/04A/08A 6 ...
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... This address stays valid between operations as long as the chip power is maintained. The address “roll over” during read is from the last byte of the last memory page to the first byte of the first page. The address “roll over” during write is from the last byte of the current page to the first byte of the same page ...
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... SDA LINE AT24C02A/04A/08A 8 address will “roll over” and the sequential read will con- tinue. The sequential read operation is terminated when the microcontroller does not respond with a zero but does generate a following stop condition (refer to Figure 6 ...
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Figure 4. Current Address Read SDA LINE Figure 5. Random Read DEVICE T ADDRESS SDA LINE Figure 6. Sequential Read DEVICE T D ADDRESS M L ...
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... AT24C02A Ordering Information t (max) I (max) I (max (ms 3000 18 3000 18 10 1500 4 1500 4 10 1000 4 1000 4 10 800 3 800 3 8P3 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 14S 14-Lead, 0.150" ...
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AT24C04A Ordering Information t (max) I (max) I (max (ms 3000 18 3000 18 10 1500 4 1500 4 10 1000 4 1000 4 10 800 3 800 3 8P3 8-Lead, 0.300" ...
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... Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 14S 14-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (SOIC) 8T 8-Lead, 0.170” Wide, Thin Shrink Small Outline Package (TSSOP) Blank Standard Operation (4.5V to 5.5V) -2.7 Low-Voltage (2.7V to 5.5V) -2.5 Low-Voltage (2.5V to 5.5V) -1.8 Low-Voltage (1.8V to 5.5V) AT24C02A/04A/08A 12 f MAX (kHz) Ordering Code 400 AT24C08A-10PC AT24C08AN-10SC AT24C08A-10SC AT24C08A-10TC 400 AT24C08A-10PI ...
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Packaging Information 8P3, 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-001 BA .400 (10.16) .355 (9.02) PIN 1 .300 (7.62) REF .210 (5.33) MAX .100 (2.54) BSC SEATING PLANE .150 (3.81) .115 ...