AT24HC04B-W-11 ATMEL [ATMEL Corporation], AT24HC04B-W-11 Datasheet

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AT24HC04B-W-11

Manufacturer Part Number
AT24HC04B-W-11
Description
Two-wire Serial EEPROM 4K (512 x 8)
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Features
Description
The AT24HC04B provides 4096 bits of serial electrically erasable and programmable
read-only memory (EEPROM) organized as 512 words of 8 bits each. The device is
optimized for use in many industrial and commercial applications where low-power
and low-voltage operation are essential. The AT24HC04B is available in space-saving
8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a
two-wire serial interface. In addition, the entire family is available in 1.8V (1.8V to
5.5V) version.
Table 0-1.
Pin Name
A1, A2
SDA
SCL
WP
NC
Write Protect Pin for Hardware Data Protection
Low-voltage and Standard-voltage Operation
Internally Organized 512 x 8 (4K)
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (5V) and 400 kHz (1.8V, 2.5V, 2.7V) Clock Rate
16-byte Page
Partial Page Writes Allowed
Self-timed Write Cycle (5 ms Max)
High Reliability
8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP Packages
Die Sales: Wafer Form, Tape and Reel, and Bumped Wafers
– Utilizes Different Array Protection Compared to the AT24C04B
– 1.8 (V
– Endurance: One Million Write Cycles
– Data Retention: 100 Years
CC
= 1.8V to 5.5V)
Pin Configuration
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
No-connect
GND
NC
A1
A2
GND
GND
NC
NC
A1
A2
A1
A2
8-lead TSSOP
8-lead SOIC
8-lead PDIP
1
2
3
4
1
2
3
4
1
2
3
4
8
7
6
5
8
7
6
5
8
7
6
5
VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
Two-wire Serial
EEPROM
4K (512 x 8)
AT24HC04B
5227E–SEEPR–11/08

Related parts for AT24HC04B-W-11

AT24HC04B-W-11 Summary of contents

Page 1

... Die Sales: Wafer Form, Tape and Reel, and Bumped Wafers Description The AT24HC04B provides 4096 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 512 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential ...

Page 2

... Operating Temperature......................................−40°C to +125°C Storage Temperature .........................................−65°C to +150°C Voltage on Any Pin with Respect to Ground ........................................ −1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Figure 0-1. VCC GND WP SCL SDA AT24HC04B 2 *NOTICE: Block Diagram START STOP LOGIC LOAD DEVICE ADDRESS COMPARATOR 2 R/W 1 ADDR/COUNTER ...

Page 3

... DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2 and A1 pins are device address inputs that must be hardwired for the AT24HC04B. As many as four 4K devices may be addressed on a single bus system. The A0 pin is a no-connect. (Device addressing and Page addressing are discussed in detail under Device Addressing and Page Addressing, WRITE PROTECT (WP): The AT24HC04B has a WP pin that provides hardware data protec- tion ...

Page 4

... Memory Organization AT24HC04B, 4K SERIAL EEPROM: The 4K is internally organized with 32 pages of 16 bytes each. Random word addressing requires an 9-bit data word address. (1) Table 2-1. Pin Capacitance Applicable over recommended operating range from T Symbol Test Condition C Input/Output Capacitance (SDA) I/O C Input Capacitance (A IN Note: 1 ...

Page 5

... V = +1.8V to +5.5V TTL Gate and – 1.8, 2.5, 2.7 Min Max Min 400 1.2 0.4 0.6 0.4 50 0.1 0.9 0.05 1.2 0.5 0.6 0.25 0.6 0. 100 100 0.3 300 0.6 . Million AT24HC04B 5.0-volt Max Units 1000 kHz µs µ 0.55 µs µs µs µs µs ns 0.3 µs 100 ns µ Write Cycles 5 ...

Page 6

... ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. word. This happens during the ninth clock cycle. STANDBY MODE: The AT24HC04B features a low-power standby mode that is enabled: (a) upon power-up and (b) after the receipt of the Stop bit and the completion of any internal operations. ...

Page 7

... WR 5227E–SEEPR–11/08 Dummy Clock Cycles HIGH LOW LOW t t HD.STA HD.DAT t AA ACK t wr STOP CONDITION AT24HC04B Start bit SU.DAT t DH (1) START CONDITION Stop bit SU.STO t BUF 7 ...

Page 8

... The eighth bit of the device address is the read/write operation select bit. A read operation is ini- tiated if this bit is high, and a write operation is initiated if this bit is low. Upon a compare of the device address, the EEPROM will output a “0” compare is not made, the chip will return to a standby state. AT24HC04B 8 1 START ...

Page 9

... DEVICE T E ADDRESS SDA LINE WORD ADDRESS (n) DATA ( AT24HC04B Figure 5-1 on page WORD ADDRESS DATA Figure 5-2. DATA ( ...

Page 10

... Figure 6-2. SDA LINE SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a ran- dom address read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment AT24HC04B 10 Current Address Read ...

Page 11

... The sequential read operation is terminated when the microcontroller does not respond with a “0” but does generate a following stop condition, see Figure 6-3. Sequential Read 5227E–SEEPR–11/08 AT24HC04B Figure 6-3. 11 ...

Page 12

... AT24HC04B-TH-T (NiPdAu Lead Finish) (3) AT24HC04B-W-11 Notes: 1. “-B” denotes bulk. 2. “-T” denotes tape and reel. SOIC = 4K per reel. TSSOP = 5K per reel. 3. Available in tape and reel and wafer form; order as SL788 for inkless wafer form. Bumped die available upon request. Please contact Serial Interface Marketing ...

Page 13

... Seal Year Y = SEAL YEAR | Seal Week 6: 2006 | | | 7: 2007 8: 2008 2009 Lot Number to Use ALL Characters in Marking BOTTOM MARK AT24HC04B WW = SEAL WEEK 0: 2010 02 = Week 2 1: 2011 04 = Week 4 2: 2012 :: : :::: : 3: 2013 :: : :::: :: 50 = Week Week 52 No Bottom Mark WW = SEAL WEEK 0: 2010 02 = Week 2 ...

Page 14

... Y W |---|---|---|---|---| |---|---|---|---|---| BOTTOM MARK |---|---|---|---|---|---|---| X X |---|---|---|---|---|---|---| |---|---|---|---|---|---|---| <- Pin 1 Indicator TOP MARK Seal Year AT24HC04B SEAL YEAR 6: 2006 0: 2010 7: 2007 1: 2011 W 8: 2008 2: 2012 9: 2009 3: 2013 COUNTRY OF ORIGIN SEAL YEAR WW = SEAL WEEK 02 = Week Week :::: : :: : :::: :: ...

Page 15

... Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R 5227E–SEEPR–11/ TITLE 8P3, 8-lead, 0.300" Wide Body, Plastic Dual In-line Package (PDIP) AT24HC04B End View COMMON DIMENSIONS (Unit of Measure = inches) SYMBOL MIN NOM MAX A – – 0.210 A2 ...

Page 16

... JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT24HC04B TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing ...

Page 17

... Dimension D and determined at Datum Plane H. 2325 Orchard Parkway San Jose, CA 95131 R 5227E–SEEPR–11/ TITLE 8A2, 8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) AT24HC04B L1 L End View COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM D 2.90 3.00 3 ...

Page 18

... Revision History Doc. Rev. 5227E 5227D 5227C 5227B 5227A AT24HC04B 18 Date Comments 11/2008 Updated pin configurations 1/2008 Removed ‘preliminary’ status 8/2007 Added Part Marking Scheme Updated to new template 8/2007 Updated Common figures Added Part Marking tables 4/2007 Initial document release. ...

Page 19

Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to ...

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