AT88SC0404C_09 ATMEL [ATMEL Corporation], AT88SC0404C_09 Datasheet
AT88SC0404C_09
Related parts for AT88SC0404C_09
AT88SC0404C_09 Summary of contents
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... Features • One of a Family of 9 Devices with User Memories from 1 Kbit to 256-Kbit • 4-Kbit (512-byte) EEPROM User Memory ⎯ Four 128-byte (1-Kbit) Zones ⎯ Self-timed Write Cycle ⎯ Single Byte or 16-byte Page Write Mode ⎯ Programmable Access Rights for Each Zone • ...
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... Description The AT88SC0404C member of the CryptoMemory user memory with advanced security and cryptographic features built in. The user memory is divided into four 128-byte zones, each of which may be individually set with different security access rights or effectively combined together to provide space for data files. ...
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Figure 2. Block Diagram V CC GND Management Synchronous SCL/CLK Asynchronous SDA/IO ISO Interface RST Reset Block 2. Pin Descriptions 2.1. Supply Voltage (V CC The V input is a 2.7V to 5.5V positive voltage supplied by the host. CC ...
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Maximum Ratings Operating Temperature.............................−40°C to +85°C Storage Temperature ............................−65° 150°C Voltage on Any Pin with Respect to Ground .......................− 0 Maximum Operating Voltage.......................................6.0V DC Output Current ..................................................5.0 mA Table 2. DC Characteristics Applicable over ...
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... Write Cycle Time (-40° to +85° Device Operation for Synchronous Protocols CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA pin START CONDITION: STOP CONDITION: ACKNOWLEDGE: MEMORY RESET: 2023KS–SMEM–10/09 = +2.7 to 5.5V, CC Parameter Range: +4.5 - 5.5V) CC Range: +2.7 - 3.3V) CC may change only during SCL low time periods (see Figure 5 on page 7) ...
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Figure 3. Bus Timing for 2 wire communications: SCL: Serial Clock, SDA – Serial Data I/O SCL t SU.STA SDA IN SDA OUT Figure 4. Write Cycle Timing: SCL: Serial Clock, SDA – Serial Data I/O SCL SDA 8th BIT ...
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Figure 5. Data Validity SDA SCL DATA STABLE Figure 6. Start and Stop Definitions SDA SCL START Figure 7. Output Acknowledge SCL DATA IN DATA OUT 2023KS–SMEM–10/09 DATA STABLE DATA CHANGE ALLOWED STOP 1 8 ...
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... User Zones The EEPROM user memory is divided into 4 zones of 1024 bits each. Multiple zones allow for different types of data or files to be stored in different zones. Access to the user zones is allowed only after security requirements have been met. These security requirements are defined by the user during the personalization of the device in the configuration memory ...
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... The configuration memory consists of 2048 bits of EEPROM memory used for storing passwords, keys and codes and for defining security levels to be used for each user zone. Access rights to the configuration memory are defined in the control logic and may not be altered by the user. ...
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... RST goes high after 400 clock cycles. The device will respond with a 64-bit ATR code, including historical bytes to indicate the memory density within the CryptoMemory family. Once the asynchronous mode has been selected not possible to switch to the synchronous mode without powering off the device. ...
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... Synchronous 2-wire Serial Interface The synchronous mode is the default after powering up V applications using CryptoMemory in standard plastic packages, this is the only communication protocol. • Power- RST goes high also. CC • After stable V , CLK-SCL and I/O-SDA may be driven. CC Figure 11. Synchronous 2-wire Protocol ...
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Security Options 11.1. Anti-tearing In the event of a power loss during a write cycle, the integrity of the device’s stored data may be recovered. This function is optional: the host may choose to activate the anti-tearing function, depending ...
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Password Verification Passwords may be used to protect read and/or write access of any user zone. When a valid password is presented memorized and active until power is turned off, unless a new password is presented or ...
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... The data exchanged between the device and the host during read, write and verify password commands may be encrypted to ensure data confidentiality. The issuer may choose to require encryption for a user zone by settings made in the configuration memory. Any one of four keys may be selected for use with a user zone. In this case, activation of the encryption mode is required in order to read/write data in the zone and only encrypted data will be transmitted ...
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Ordering Information Ordering Code AT88SC0404C-MJ AT88SC0404C-MP AT88SC0404C-MJTG AT88SC0404C-MPTG AT88SC0404C-PU AT88SC0404C-SU AT88SC0404C-WI (1) (2) Package Type M2 – J Module : ISO or TWI M2 – P Module : ISO or TWI 8P3 8S1 1. Formal drawings may be obtained ...
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Packaging Information Ordering Code MJTG Module Size: M2 Dimension*: 12.6 x 11.4 [mm] Glob Top: Thickness: Pitch: *Note: The module dimensions listed refer to the dimensions of the exposed metal contact area. The actual dimensions of the ...
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Ordering Code: SU 8S1 – JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado ...
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Ordering Code: PU 8P3 – PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA, for additional information. 2. Dimensions A and L are ...
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... Updated to 2009 Copyright.. 11/2008 Updated timing diagrams. 04/2007 Final release version. 03/2007 Implemented revision history. Removed Industrial package offerings. Removed 8Y4 offering. Replaced User Zone, Memory Configuration, and Write Lock Example tables with new information AT88SC0404C Comments and all 3 instances of Vih CC 19 ...
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Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Disclaimer: The information in this document is provided in connection with Atmel ...