AT45DB041-CC ATMEL [ATMEL Corporation], AT45DB041-CC Datasheet

no-image

AT45DB041-CC

Manufacturer Part Number
AT45DB041-CC
Description
4-Megabit 2.7-volt Only Serial DataFlash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT45DB041-CC
Manufacturer:
LAT
Quantity:
2
Features
Description
The AT45DB041 is a 2.7-volt only, serial interface Flash memory suitable for in-sys-
tem reprogramming. Its 4,325,376 bits of memory are organized as 2048 pages of
264-bytes each. In addition to the main memory, the AT45DB041 also contains two
SRAM data buffers of 264-bytes each. The buffers allow receiving of data while a
page in the main memory is being reprogrammed. Unlike conventional Flash memo-
ries that are accessed randomly with multiple address lines and a parallel interface,
the DataFlash uses a serial interface to sequentially access its data. The simple serial
interface facilitates hardware layout, increases system reliability, minimizes switching
Pin Configurations
Pin Name
CS
SCK
SI
SO
WP
RESET
RDY/BUSY
Single 2.7V - 3.6V Supply
Serial Interface Architecture
Page Program Operation
Two 264-Byte SRAM Data Buffers – Allows Receiving of Data
While Reprogramming of Non-Volatile Memory
Internal Program and Control Timer
Fast Page Program Time – 7 ms Typical
120 s Typical Page to Buffer Transfer Time
Low Power Dissipation
5 MHz Max Clock Frequency
Hardware Data Protection Feature
Serial Peripheral Interface (SPI) Compatible – Modes 0 and 3
CMOS and TTL Compatible Inputs and Outputs
Commercial and Industrial Temperature Ranges
RDY/BUSY
– Single Cycle Reprogram (Erase and Program)
– 2048 Pages (264 Bytes/Page) Main Memory
– 4 mA Active Read Current Typical
– 8 A CMOS Standby Current Typical
RESET
GND
VCC
SCK
WP
NC
NC
NC
NC
NC
CS
SO
SI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Function
Chip Select
Serial Clock
Serial Input
Serial Output
Hardware Page Write
Protect Pin
Chip Reset
Ready/Busy
TSOP Top View
Type 1
Note: PLCC package pins 16
and 17 are DON’T CONNECT.
SCK
SO
NC
NC
NC
NC
NC
NC
SI
5
6
7
8
9
10
11
12
13
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PLCC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
29
28
27
26
25
24
23
22
21
WP
RESET
RDY/BUSY
NC
NC
NC
NC
NC
NC
A
B
C
D
E
Through Package
CBGA Top View
GND
SCK
NC
NC
SO
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
CS
1
SI
SCK
NC
SO
NC
CS
2
RDY/BSY
1
2
3
4
5
6
7
8
9
10
11
12
13
14
GND
NC
NC
3
SI
SOIC
RESET
VCC
NC
WP
NC
4
28
27
26
25
24
23
22
21
20
19
18
17
16
15
(continued)
NC
NC
NC
NC
NC
5
VCC
NC
NC
WP
RESET
RDY/BUSY
NC
NC
NC
NC
NC
NC
NC
NC
4-Megabit
2.7-volt Only
Serial
DataFlash
AT45DB041
Rev. 0669D–07/98
®
1

Related parts for AT45DB041-CC

AT45DB041-CC Summary of contents

Page 1

... Commercial and Industrial Temperature Ranges Description The AT45DB041 is a 2.7-volt only, serial interface Flash memory suitable for in-sys- tem reprogramming. Its 4,325,376 bits of memory are organized as 2048 pages of 264-bytes each. In addition to the main memory, the AT45DB041 also contains two SRAM data buffers of 264-bytes each. The buffers allow receiving of data while a page in the main memory is being reprogrammed ...

Page 2

... To start a page read, the 8-bit opcode, 52H, is followed by 24 address bits and 32 don’t care bits. In the AT45DB041, the first four address bits are reserved for larger density devices (see Notes on page 8), the next 11 address bits ...

Page 3

... The loading of the opcode and the address bits is the same as described pre- viously ...

Page 4

... The device density is indicated using bits 5, 4, and 3 of the status register. For the AT45DB041, the three bits are 0, 1, and 1. The decimal value of these three binary bits does not equate to the device density; the three bits represent a ...

Page 5

... This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. AT45DB041 - 2.7V to 3.6V 5 ...

Page 6

... P t RESET Pulse Width RST t RESET Recovery Time REC Input Test Waveforms and Measurement Levels 2.4V AC DRIVING LEVELS 0.45V < (10 AT45DB041 6 Condition CS, RESET all inputs at IH CMOS levels MHz mA 3.6V OUT 3. CMOS levels IN ...

Page 7

AC Waveforms Two different timing diagrams are shown below. Waveform 1 shows the SCK signal being low when CS makes a high- to-low transition, and Waveform 2 shows the SCK signal being high when CS makes a high-to-low transition. Both ...

Page 8

... It is recommended that “r” logical “0” for densities of 4M bit or smaller. 3. For densities larger than 4M bit, the “r” bits become the most significant Page Address bit for the appropriate density. AT45DB041 8 SI CMD 8 bits ...

Page 9

... Main Memory Page Program through Buffers CS SI CMD PA9-7 Buffer Write CS SI CMD Buffer to Main Memory Page Program (Data from Buffer Programmed into Flash Page Each transition represents 8 bits and 8 clock cycles FLASH MEMORY ARRAY MAIN MEMORY PAGE PROGRAM ...

Page 10

... Main Memory Page to Buffer Transfer (Data from Flash Page Read into Buffer Buffer Read Each transition represents 8 bits and 8 clock cycles AT45DB041 10 FLASH MEMORY ARRAY MAIN MEMORY PAGE READ I/O INTERFACE SO PA6-0, BA8 BA7-0 X Starts reading page data into buffer ...

Page 11

... Detailed Bit-Level Read Timing – Inactive Clock Polarity Low Main Memory Page Read CS SCK 1 2 tSU COMMAND OPCODE Buffer Read CS SCK 1 2 tSU COMMAND OPCODE Status Register Read CS SCK 1 2 tSU HIGH-IMPEDANCE ...

Page 12

... COMMAND OPCODE Buffer Read CS SCK 1 2 tSU COMMAND OPCODE Status Register Read CS SCK tSU HIGH-IMPEDANCE SO AT45DB041 HIGH-IMPEDANCE HIGH-IMPEDANCE COMMAND OPCODE ...

Page 13

... PA4 PA4 PA3 PA3 PA2 PA2 PA1 PA1 PA0 PA0 Main Memory Main Memory Page to Buffer 1 Page to Buffer 2 Compare Compare 60H 61H ...

Page 14

... (Don’t Care) r (reserved bits) AT45DB041 14 Buffer 2 to Main Memory Main Main Page Memory Memory Program Page Page without Program Program Built-In Through Through Erase Buffer 1 Buffer 2 Opcode 89H 82H ...

Page 15

... This type of algorithm is used for applications in which the entire array is programmed sequentially, filling the array page-by- page page can be written using either a Main Memory Page Program operation or a Buffer Write operation followed by a Buffer to Main Memory Page Program operation. 3. The algorithm above shows the programming of a single page. The algorithm will be repeated sequentially for each page within the entire array ...

Page 16

... Other algorithms can be used to rewrite portions of the Flash array. Low power applications may choose to wait until 10,000 cumulative page erase/program operations have accumulated before rewriting all pages of the Flash array. See application note AN-4 (“Using Atmel’s Serial DataFlash”) for more details. AT45DB041 16 START ...

Page 17

... Wide, Plastic Gull-Wing Small Outline Package (SOIC) 28T 28-Lead, Plastic Thin Small Outline Package (TSOP) 24C1 24-Ball Array Plastic Chip-Scale Ball Grid Array (CBGA) Ordering Code AT45DB041-JC AT45DB041-RC AT45DB041-TC AT45DB041-CC AT45DB041-JI AT45DB041-RI AT45DB041-TI AT45DB041-CI Package Type Package Operation Range 32J ...

Page 18

... Plastic Thin Small Outline Package (TSOP) Dimensions in Millimeters and (Inches)* *Controlling dimension: millimeters AT45DB041 18 28R, 28-Lead, 0.330" Wide, Plastic Gull Wing Small Outline (SOIC) Dimensions in Inches and (Millimeters) .025(.635) X 30° - 45° .012(.305) .008(.203) ...

Related keywords