MCP79510 MAS [Micro Analog systems], MCP79510 Datasheet - Page 33

no-image

MCP79510

Manufacturer Part Number
MCP79510
Description
3V SPI Real-Time Clock Calendar with Battery Switchover
Manufacturer
MAS [Micro Analog systems]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP79510-I/MS
Manufacturer:
MICROCHIP
Quantity:
1 500
Part Number:
MCP79510-I/MS
0
Part Number:
MCP79510-IMS
Manufacturer:
MICROCHIP
Quantity:
3 813
Part Number:
MCP79510-IMS
Manufacturer:
MICROCHIP
Quantity:
3 812
Part Number:
MCP79510-IMS
Manufacturer:
MICROCHIP
Quantity:
1 188
Company:
Part Number:
MCP79510T-I/MS
Quantity:
2 500
9.1.8
The following protection has been implemented to pre-
vent inadvertent writes to the array:
• The write enable latch is reset on power-up
• A Write Enable instruction must be issued to set
• After a byte write, page write, unique ID write, or
• CS must be set high after the proper number of
FIGURE 9-7:
9.2
The MCP795XX has been designed to operate with a
standard 32.768 kHz tuning fork crystal. The on-board
oscillator has been characterized to operate with a
crystal of maximum ESR of 70K Ohms.
Crystals with a comparable specification are also suit-
able for use with the MCP795XX.
The table below is given as design guidance and a
starting point for crystal and capacitor selection.
EQUATION 9-1:
The following must also be taken into consideration:
• Pin capacitance (to be included in Cx2 and Cx1)
 2012 Microchip Technology Inc.
Micro Crystal
Citizen
Please work with your crystal vendor.
the write enable latch
STATUS register write, the write enable latch is
reset
clock cycles to start an internal write cycle
Manufacturer
Crystal Specification and
Selection
DATA PROTECTION
C
load
SCK
CS
SO
=
SI
-----------------------------
CX2
CX2 CX1
CLRRAM
CM7V-T1A
CM200S-32.768KDZB-UT
+
0
0
CX1
1
Part Number
1
+
0
2
Instruction
C
stray
1
3
0
4
1
5
0
Preliminary
6
0
7pF
6pF
7
Capacitance
A7
8
MCP7952X/MCP7951X
Crystal
6
• Access to the array during an internal EEPROM
• Block protect bits are ignored for UID writes
9.1.9
The Clear Ram instruction is a 2-byte command that
will reset the internal SRAM to the known value. Using
this command, all locations in the SRAM are set to 00h
and the data value contained in the second byte of the
command is ignored.
• Stray Board Capacitance
The recommended board layout for the oscillator area
is shown in
crystal and the load capacitors. In this example, C2 is
CX1, C1 is CX2 and the crystal is designated as Y1.
When calculating the effective load capacitance,
Equation 9-1
9 10 11 12 13 14 15
High-Impedance
write cycle is ignored and programming is contin-
ued
5
4
Data
10pF
10pF
3
CLEAR RAM INSTRUCTION
Figure
can be used.
2
CX1 Value
1 A0
9-8. This actual board shows the
12pF
8 pF
DS22300A-page 33
CX2 Value

Related parts for MCP79510