LM5071MT-50 NSC [National Semiconductor], LM5071MT-50 Datasheet - Page 3

• Manufacturer Part Number: LM5071MT-50
• Description: Power Over Ethernet PD Controller with Auxiliary Power Power Over Ethernet PD Controller with Auxiliary Power
• Manufacturer: NSC [National Semiconductor]

Pin
10
11
12
13
14
15
16
Pin Descriptions
1
2
3
4
5
6
7
8
9
RT / SYNC Oscillator timing resistor pin and
UVLORTN Return for the external UVLO resistors.
RCLASS
COMP
Name
UVLO
ARTN
RSIG
AUX
RTN
OUT
VEE
V
VIN
CS
SS
FB
CC
System high potential input.
Signature resistor pin.
Classification resistor pin.
Auxiliary input power startup pin.
Line under-voltage lockout.
System low potential input.
System return for the PWM converter.
Output of the PWM controller.
Output of the internal high voltage
series pass regulator. Regulated output
voltage is nominally 7.8V.
Feedback signal.
The output of the error amplifier and
input to the Pulse Width Modulator.
Current sense input.
synchronization input.
Soft-start input.
Analog PWM supply return.
Description
The diode “OR” of several lines entering the PD, it is the more
positive input potential.
Connect a resistor from V
resistor is in parallel with the UVLO resistors and should be valued
accordingly.
Connect the classification programming resistor from this pin to V
A resistor divider between the AUX voltage input to VEE programs
the startup levels with a 2.5V threshold. A high value (
internal pull down resistor is present to pull the pin low if it is left
open. In practice, the divider voltage should be set well above 2.5V
by the programming resistors.
An external resistor divider from V
shutdown levels with a 2.00V threshold at the UVLO pin. Hysteresis
is set by a switched internal 10uA current source that forces
additional current into the resistor divider.
Connect the bottom resistor of the resistor divider between the
UVLO pin and this pin.
Diode “OR’d” to the RJ45 connector and PSE’s –48V supply, it is
the more negative input potential.
The drain of the internal current limiting power MOSFET which
connects V
DC-DC converter gate driver output with 800mA peak sink current
capability.
When the auxiliary transformer winding (if used) raises the voltage
on this pin above the regulation set point, the internal series pass
regulator will shutdown, reducing the controller power dissipation.
Inverting input of the internal error amplifier. The non-inverting input
is internally connected to a 1.25V reference.
COMP pull-up is provided by an internal 5K resistor which may be
used to bias an opto-coupler transistor.
Current sense input for current mode control and over-current
protection. Current limiting is accomplished using a dedicated
current sense comparator. If the CS pin voltage exceeds 0.5V the
OUT pin switches low for cycle-by-cycle current limiting. CS is held
low for 50ns after OUT switches high to blank leading edge current
spikes.
An external resistor connected from RT to ARTN sets the oscillator
frequency. This pin will also accept narrow ac-coupled
synchronization pulses from an external clock.
An external capacitor and an internal 10uA current source set the
soft-start ramp rate.
RTN for sensitive analog circuitry including the SMPS current limit
amplifier.
3
EE
to the return path of the dc-dc converter.
Application Information
IN
to this pin for signature detection. The
IN
to UVLORTN programs the
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300kΩ)
EE
.