ATMEGA169 ATMEL [ATMEL Corporation], ATMEGA169 Datasheet - Page 34

• Manufacturer Part Number: ATMEGA169
• Description: 8-bit Microcontroller with 16K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

Standby Mode
Table 15. Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Notes:
Power Reduction
Register
Power Reduction Register -
PRR
34
Sleep Mode
Idle
ADC Noise
Reduction
Power-down
Power-save
Standby
1. Only recommended with external crystal or resonator selected as clock source.
2. If either LCD controller or Timer/Counter2 is running in asynchronous mode.
3. For INT0, only level interrupt.
(1)
ATmega169/V
clk
CPU
Active Clock Domains
clk
FLASH
clk
X
IO
clk
The LCD controller and Timer/Counter2 can be clocked both synchronously and asyn-
chronously in Power-save mode. The clock source for the two modules can be selected
independent of each other. If neither the LCD controller nor the Timer/Counter2 is using
the asynchronous clock, the Timer/Counter Oscillator is stopped during sleep. If neither
the LCD controller nor the Timer/Counter2 is using the synchronous clock, the clock
source is stopped during sleep. Note that even if the synchronous clock is running in
Power-save, this clock is only available for the LCD controller and Timer/Counter2.
When the SM2..0 bits are 110 and an external crystal/resonator clock option is selected,
the SLEEP instruction makes the MCU enter Standby mode. This mode is identical to
Power-down with the exception that the Oscillator is kept running. From Standby mode,
the device wakes up in six clock cycles.
The Power Reduction Register, PRR, provides a method to stop the clock to individual
peripherals to reduce power consumption. The current state of the peripheral is frozen
and the I/O registers can not be read or written. Resources used by the peripheral when
stopping the clock will remain occupied, hence the peripheral should in most cases be
disabled before stopping the clock. Waking up a module, which is done by clearing the
bit in PRR, puts the module in the same state as before shutdown.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the
overall power consumption. See “Supply Current of I/O modules” on page 310 for exam-
ples. In all other sleep modes, the clock is already stopped.
• Bit 7..5 - Res: Reserved bits
These bits are reserved in ATmega169 and will always read as zero.
X
X
Bit
Read/Write
Initial Value
ADC
clk
X
X
X
ASY
Main Clock
Enabled
Source
7
–
R
0
Oscillators
X
X
X
Enabled
R
6
–
0
Timer
Osc
X
X
X
(2)
(2)
R
5
–
0
and Pin
Chang
INT0
X
X
X
X
X
e
(3)
(3)
(3)
(3)
PRLCD
R/W
4
0
Condition
USI Start
X
X
X
X
X
PRTIM1
R/W
3
0
Controller Timer2
Wake-up Sources
LCD
X
X
X
PRSPI
(2)
R/W
2
0
PRUSART0
X
X
X
(2)
R/W
1
0
EEPROM
Ready
SPM/
X
X
PRADC
R/W
2514P–AVR–07/06
0
0
ADC
X
X
PRR
Other
I/O
X