AT90PWM2B-16SE ATMEL [ATMEL Corporation], AT90PWM2B-16SE Datasheet - Page 219

• Manufacturer Part Number: AT90PWM2B-16SE
• Description: 8-bit Microcontroller with 8K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

19.5.3
19.5.4
19.5.5
4317J–AVR–08/10
Receiving 17 Data Bit Frames
Receive Complete Flag and Interrupt
Receiver Error Flags
The following code example shows a simple EUSART receive function.
Note:
In this configuration the seventeenth bit shoud be read from the RXB8 bit register, the rest of the
most significant bits (9, 10, 11, 12, 13, 14, 15 and 16) should be read from the EUDR register,
before the low byte of the character is read from UDR.
The EUSART Receiver has the same USART flag that indicates the Receiver state.
See “Receive Complete Flag and Interrupt” in USART section.
When the EUSART is not configured in Manchester mode, the EUSART has the three same
errors flags as standard mode: Frame Error (FE), Data OverRun (DOR) and Parity Error (UPE).
All can be accessed by reading UCSRA. (See “Receiver Error Flags” in USART section).
When the EUSART is configured in Machester mode, the EUSART has two errors flags: Data
OverRun (DOR), and Manchester framing error (FEM bit of EUCSRC).
Assembly Code Example
C Code Example
TABLE 3.
EUSART_Receive:
unsigned int EUSART_Receive( void )
{
}
; Wait for data to be received
sbis UCSRA, RXC
rjmp EUSART_Receive
; Get MSB (r15), LSB (r16)
lds
lds
ret
unsigneg int rx_data
/* Wait for data to be received */
while ( !(UCSRA & (1<<RXC)) )
/* Get and return received data from buffer */
rx_data=EUDR;
rx_data=rx_data<<8+UDR;
return rx_data;
The example code assumes that the part specific header file is included.
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”
instructions must be replaced with instructions that allow access to extended I/O. Typically “LDS”
and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
r15, EUDR
r16, UDR
;
(1)
(1)
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