AT91R40008_05 ATMEL [ATMEL Corporation], AT91R40008_05 Datasheet

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AT91R40008_05

Manufacturer Part Number
AT91R40008_05
Description
AT91 ARM Thumb Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Features
1. Description
The AT91R40008 microcontroller is a member of the Atmel AT91 16-/32-bit microcon-
troller family, which is based on the ARM7TDMI processor core. This processor has a
high-performance, 32-bit RISC architecture with a high-density, 16-bit instruction set
and very low power consumption. Furthermore, it features 256K bytes of on-chip
SRAM and a large number of internally banked registers, resulting in very fast excep-
tion handling, and making the device ideal for real-time control applications.
The AT91R40008 microcontroller features a direct connection to off-chip memory,
including Flash, through the fully-programmable External Bus Interface (EBI). An
8-level priority vectored interrupt controller, in conjunction with the Peripheral Data
Controller, significantly improves the real-time performance of the device.
The device is manufactured using Atmel’s high-density CMOS technology. By com-
bining the ARM7TDMI processor core with a large, on-chip, high-speed SRAM and a
wide range of peripheral functions on a monolithic chip, the AT91R40008 is a powerful
microcontroller that offers a flexible and high-performance solution to many compute-
intensive embedded control applications.
Incorporates the ARM7TDMI
8-, 16- and 32-bit Read and Write Support
256K Bytes of On-chip SRAM
Fully-programmable External Bus Interface (EBI)
Eight-level Priority, Individually Maskable, Vectored Interrupt Controller
32 Programmable I/O Lines
Three-channel 16-bit Timer/Counter
Two USARTs
Programmable Watchdog Timer
Advanced Power-saving Features
Fully Static Operation
2.7V to 3.6V I/O Operating Range
1.65V to 1.95V Core Operating Range
Available in 100-lead TQFP Package
-40 C to +85 C Temperature Range
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– Little-endian
– EmbeddedICE
– 32-bit Data Bus
– Single-clock Cycle Access
– Maximum External Address Space of 64M Bytes
– Up to Eight Chip Selects
– Software Programmable 8/16-bit External Data Bus
– Four External Interrupts, Including a High-priority, Low-latency Interrupt Request
– Three External Clock Inputs
– Two Multi-purpose I/O Pins per Channel
– Two Dedicated Peripheral Data Controller (PDC) Channels per USART
– CPU and Peripheral Can be Deactivated Individually
– 0 Hz to 75 MHz Internal Frequency Range at V
(In-circuit Emulation)
®
ARM
®
Thumb
®
Processor Core
DDCORE
= 1.8V, 85°C
AT91
ARM
Microcontrollers
AT91R40008
Electrical
Characteristics
®
1795E–ATARM–12-Dec-05
Thumb
®

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AT91R40008_05 Summary of contents

Page 1

Features ® • Incorporates the ARM7TDMI ARM – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – Little-endian ™ – EmbeddedICE (In-circuit Emulation) • 8-, 16- and 32-bit Read and Write Support • 256K Bytes ...

Page 2

Absolute Maximum Ratings* Operating Temperature (Industrial Storage Temperature...................... - 150 C Voltage on Any Input Pin with Respect to Ground ..................................................-0.3V to max of V .......................................................... + 0.3V and ...

Page 3

DC Characteristics The following characteristics are applicable to the Operating Temperature range: T specified and are certified for a Junction Temperature up to 100 C. Table 3-1. DC Characteristics Symbol Parameter V DC Supply I/Os DDIO V DC Supply ...

Page 4

Power Consumption The values in the following tables are values measured in the typical operating conditions (i.e., V DDIO as demonstrative values. Table 4-1. Mode Reset Normal Idle Note: Table 4-2. Peripheral PIO Controller Timer/Counter Channel Timer/Counter Block (3 ...

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Table 4-3. Table 4-4 Table 4-4. Symbol JA JC 4.1.2 Reliability Data The number of gates and the device die size are provided for the user to calculate reliability data with another standard and/or in another environmental model. Table 4-5. ...

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Conditions 5.1 Timing Results The delays are given as typical values in the following conditions: • V DDIO • V DDCORE • Ambient Temperature = 25 C • Load Capacitance = 0 pF • The output level change detection ...

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Temperature Derating Factor Figure 5-1. 5.3 Core Voltage Derating Factor Figure 5-2. 1795E–ATARM–12-Dec-05 Derating Curve for Different Operating Temperatures 1.2 1.1 1 0.9 0.8 -60 -40 - Operating Temperature °C Core Voltage Derating Factor 3 2.5 2 ...

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IO Voltage Derating Factor Figure 5-3. AT91R40008 8 Derating Factor for Different V DDIO 1.6 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 2 2.2 2.4 2.6 V DDIO Power Supply Levels Derating Factor for Typ Case is 1 ...

Page 9

Clock Waveforms Table 6-1. Master Clock Waveform Parameters Symbol Parameter 1/(t ) Oscillator Frequency CP t Oscillator Period CP t High Half-period CH t Low Half-period CL Table 1. Clock Propagation Times Symbol Parameter t Rising Edge Propagation Time ...

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Figure 6-2. MCKO AT91R40008 10 MCKO Relative to NRST NRST t D 1795E–ATARM–12-Dec-05 ...

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AC Characteristics 7.1 EBI Signals Relative to MCKI The following tables show timings relative to operating condition limits defined in the section See Figure 7-1 on page 14. Table 7-1. General-purpose EBI Signals Symbol Parameter EBI MCKI Falling to ...

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Table 7-2. EBI Write Signals (Continued) Symbol Parameter EBI NWR High to Chip Select Inactive 15 EBI Data Out Valid before NWR High (No Wait States) 16 EBI Data Out Valid before NWR High (Wait States) 17 EBI Data Out ...

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Table 7-3. EBI Read Signals Symbol Parameter EBI Data Setup before NRD High 31 EBI Data Hold after NRD High 32 EBI NRD Minimum Pulse Width 33 EBI NRD Minimum Pulse Width 34 Notes: 1. Early Read Protocol. 2. Standard ...

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Figure 7-1. EBI Signals Relative to MCKI MCKI NCS A23 NWAIT NUB/NLB/A0 (1) NRD (2) NRD D0 - D15 Read NWR (No Wait States) NWR (Wait States D15 to Write Notes: 1. Early Read Protocol. ...

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Peripheral Signals 7.2.1 USART Signals The inputs have to meet the minimum pulse width and period constraints shown in and Table Table 7-5. Symbol US 1 Table 7-6. Symbol US 2 Figure 7-2. RXD SCK 7.2.2 Timer/Counter Signals Due ...

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Table 7-8. Symbol TC 2 Figure 7-3. 7.2.3 Reset Signals A minimum pulse width is necessary, as shown in Table 7-9. Symbol RST 1 Figure 7-4. Only the NRST rising edge is synchronized with MCKI. The falling edge is asynchronous. ...

Page 17

Table 7-10. Symbol AIC 1 Table 7-11. Symbol AIC 2 Figure 7-5. FIQ/IRQ0/ IRQ1/IRQ2/ IRQ3 Input 7.2.5 Parallel I/O Signals The inputs have to meet the minimum pulse width shown in Figure Table 7-12. Symbol PIO 1 Figure 7-6. Inputs ...

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ICE Interface Signals Table 7-13. Symbol ICE 0 ICE 1 ICE 2 ICE 3 ICE 4 ICE 5 ICE 6 ICE 7 ICE 8 ICE 9 Figure 7-7. NTRST TMS/TDI AT91R40008 18 ICE Interface Timing Specifications Parameter Conditions NTRST ...

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Revision History Version page Comments 1795A 10-Dec-01 First Issue 7-Aug-2002 1795B Absolute Maximum Ratings: changed page 2 Table 1. DC Characteristics: changed page 2 Table 2. Power Consumption: changed page 3 Table 3. Power Consumption per Peripheral: changed page 3 ...

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Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 ...

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