ATMEGA64C1 ATMEL [ATMEL Corporation], ATMEGA64C1 Datasheet
ATMEGA64C1
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ATMEGA64C1 Summary of contents
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... In-System Programmable via SPI Port – High Precision Crystal Oscillator for CAN Operations (16 MHz) 1. See certification on Atmel web site. And note on (1) Section 16.4.3 on page 175. 8-bit Microcontroller with 16K/32K/64K Bytes In-System Programmable Flash ATmega16M1 ATmega32M1 ATmega64M1 ATmega32C1 ATmega64C1 Automotive Preliminary Summary 7647DS–AVR–08/08 ...
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... PWM Outputs 4 Fault Inputs (PSC) 0 PLL 10-bit ADC Channels 10-bit DAC Analog Comparators Current Source CAN LIN/UART On-Chip Temp. Sensor SPI Interface 7647DS–AVR–08/08 ATmega64C1 ATmega16M1 64 Kbyte 16 Kbyte 4096 bytes 1024 bytes 2048 bytes 512 bytes Yes Yes ...
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Pin Configurations Figure 1-1. ATmega32/64M1 TQFP32/QFN32 (PCINT18/PSCIN2/OC1A/MISO_A) PD2 (PCINT19/TXD/TXLIN/OC0A/SS/MOSI_A) PD3 Note: ATmega16/32/64/M1/C1 4 ATmega16/32/64M1 TQFP32/QFN32 (7*7 mm) Package (PCINT9/PSCIN1/OC1B/SS_A) PC1 3 VCC 4 GND 5 (PCINT10/T0/TXCAN) PC2 6 (PCINT11/T1/RXCAN/ICP1B) PC3 7 (PCINT0/MISO/PSCOUT2A) PB0 8 On the engineering ...
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Figure 1-2. ATmega32/64C1 TQFP32/QFN32 (PCINT19/TXD/TXLIN/OC0A/SS/MOSI_A) PD3 Note: 7647DS–AVR–08/08 ATmega32/64C1 TQFP32/QFN32 (7*7 mm) Package (PCINT18/OC1A/MISO_A) PD2 1 2 (PCINT9/OC1B/SS_A) PC1 3 VCC 4 GND 5 (PCINT10/T0/TXCAN) PC2 6 (PCINT11/T1/RXCAN/ICP1B) PC3 7 (PCINT0/MISO) PB0 8 On the first engineering samples (Parts marked ...
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Pin Descriptions : Table 1-1. QFN32 Pin Number ATmega16/32/64/M1/C1 6 Pin out description Mnemonic Type GND Power Ground: 0V reference AGND Power Analog Ground: 0V ...
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Table 1-1. QFN32 Pin Number 7647DS–AVR–08/08 Pin out description (Continued) Mnemonic Type PSCIN1 (PSC Digital Input 1) OC1B (Timer 1 Output Compare B) PC1 I/O SS_A (Alternate SPI Slave ...
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Table 1-1. QFN32 Pin Number Note: 2. Overview The ATmega16/32/64/M1/ low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ...
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Block Diagram Figure 2-1. The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in ...
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The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI ports, CAN, LIN/UART and interrupt system to continue functioning. The Power-down mode saves the regis- ter contents but freezes the Oscillator, disabling all other chip functions until the ...
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Port B (PB7..PB0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B ...
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The various special features of Port E are elaborated in 78 and “Clock Systems and their Distribution” on page 2.3.7 AVCC AVCC is the supply voltage pin for the A/D Converter, D/A Converter, Current source. It should be externally connected ...
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Register Summary Address Name Bit 7 (0xFF) Reserved – (0xFE) Reserved – (0xFD) Reserved – (0xFC) Reserved – (0xFB) Reserved – MSG 7 (0xFA) CANMSG TIMSTM15 (0xF9) CANSTMPH TIMSTM7 (0xF8) CANSTMPL IDMSK28 (0xF7) CANIDM1 IDMSK20 (0xF6) CANIDM2 IDMSK12 (0xF5) ...
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Address Name Bit 7 (0xBE) Reserved – (0xBD) Reserved – (5) (0xBC) – PIFR (5) (0xBB) – PIM (5) (0xBA) POVEN2 PMIC2 (5) (0xB9) POVEN1 PMIC1 (5) (0xB8) POVEN0 PMIC0 (5) (0xB7) PPRE1 PCTL (5) (0xB6) – POC (5) (0xB5) ...
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Address Name Bit 7 (0x7C) ADMUX REFS1 (0x7B) ADCSRB ADHSM (0x7A) ADCSRA ADEN (0x79) ADCH - / ADC9 (0x78) ADCL ADC7 / ADC1 (0x77) AMP2CSR AMP2EN (0x76) AMP1CSR AMP1EN (0x75) AMP0CSR AMP0EN (0x74) Reserved – (0x73) Reserved – (0x72) Reserved ...
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Address Name Bit 7 0x1A (0x3A) GPIOR2 GPIOR27 0x19 (0x39) GPIOR1 GPIOR17 0x18 (0x38) Reserved – 0x17 (0x37) Reserved – 0x16 (0x36) TIFR1 – 0x15 (0x35) TIFR0 – 0x14 (0x34) Reserved – 0x13 (0x33) Reserved – 0x12 (0x32) Reserved – ...
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Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr ADC Rd, Rr ADIW Rdl,K SUB Rd, Rr SUBI Rd, K SBC Rd, Rr SBCI Rd, K SBIW Rdl,K AND Rd, Rr ANDI Rd Rd, ...
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Mnemonics Operands BRIE k BRID k BIT AND BIT-TEST INSTRUCTIONS SBI P,b CBI P,b LSL Rd LSR Rd ROL Rd ROR Rd ASR Rd SWAP Rd BSET s BCLR s BST Rr, b BLD Rd, b SEC CLC SEN CLN ...
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Mnemonics Operands POP Rd MCU CONTROL INSTRUCTIONS NOP SLEEP WDR BREAK Note: 7647DS–AVR–08/08 Description Pop Register from Stack No Operation Sleep Watchdog Reset Break 1. These Instructions are only available in “16K and 32K parts” ATmega16/32/64/M1/C1 Operation Flags Rd ← ...
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Errata 5.1 Errata Summary 5.1.1 ATmega32M1/C1 Rev. C (Mask Revision) • The AMPCMPx bits return 0 5.1.2 ATmega32M1/C1 Rev. B (Mask Revision) • The AMPCMPx bits return 0 • No comparison when amplifier is used as comparator input and ...
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Slave task of master node: b. For slaves nodes, the workaround parts: The time-out counter is disabled during the RESPONSE when the workaround is set. 5. Wrong TSOFFSET manufacturing calibration value. Erroneous value of TSOFFSET programmed ...
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Ordering Information ATmega32M1 engineering samples delivery only. Figure 6-1. Memory Size PSC 32K No 32K No 32K No 32K No 32K Yes 32K Yes 32K Yes 32K Yes Note: All packages are Pb free, fully LHF ATmega16/32/64/M1/C1 22 Automotive ...
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Package Information MA Lead, 7x7 mm Body Size, 1.0 mm Body Thickness 0.5 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) MA PV, 32-Lead, 5.0x5.0 mm Body, 0.50 mm Pitch Quad Flat No Lead Package ...
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TQFP32 ATmega16/32/64/M1/C1 24 7647DS–AVR–08/08 ...
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QFN32 7647DS–AVR–08/08 ATmega16/32/64/M1/C1 25 ...
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Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to ...