ATMEGA8515_06 ATMEL [ATMEL Corporation], ATMEGA8515_06 Datasheet

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ATMEGA8515_06

Manufacturer Part Number
ATMEGA8515_06
Description
8-bit Microcontroller with 8K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Features
High-performance, Low-power AVR
RISC Architecture
Nonvolatile Program and Data Memories
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltages
Speed Grades
– 130 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16 MHz
– On-chip 2-cycle Multiplier
– 8K Bytes of In-System Self-programmable Flash
– Optional Boot Code Section with Independent Lock bits
– 512 Bytes EEPROM
– 512 Bytes Internal SRAM
– Up to 64K Bytes Optional External Memory Space
– Programming Lock for Software Security
– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
– Three PWM Channels
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated RC Oscillator
– External and Internal Interrupt Sources
– Three Sleep Modes: Idle, Power-down and Standby
– 35 Programmable I/O Lines
– 40-pin PDIP, 44-lead TQFP, 44-lead PLCC, and 44-pad QFN/MLF
– 2.7 - 5.5V for ATmega8515L
– 4.5 - 5.5V for ATmega8515
– 0 - 8 MHz for ATmega8515L
– 0 - 16 MHz for ATmega8515
Mode
Endurance: 10,000 Write/Erase Cycles
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
Endurance: 100,000 Write/Erase Cycles
®
8-bit Microcontroller
Note: This is a summary document. A complete document
is available on our Web site at www.atmel.com.
8-bit
Microcontroller
with 8K Bytes
In-System
Programmable
Flash
ATmega8515
ATmega8515L
Summary
2512JS–AVR–10/06

Related parts for ATMEGA8515_06

ATMEGA8515_06 Summary of contents

Page 1

Features • High-performance, Low-power AVR • RISC Architecture – 130 Powerful Instructions – Most Single Clock Cycle Execution – General Purpose Working Registers – Fully Static Operation – MIPS Throughput at 16 MHz – ...

Page 2

Pin Configurations Figure 1. Pinout ATmega8515 TQFP/MLF (MOSI) PB5 1 (MISO) PB6 2 (SCK) PB7 3 RESET 4 (RXD) PD0 5 NC* 6 (TXD) PD1 7 (INT0) PD2 8 (INT1) PD3 9 (XCK) PD4 10 (OC1A) PD5 11 ATmega8515(L) 2 ...

Page 3

Overview Block Diagram 2512JS–AVR–10/06 The ATmega8515 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega8515 achieves throughputs approaching 1 MIPS per MHz allowing the sys- ...

Page 4

Disclaimer AT90S4414/8515 and ATmega8515 Compatibility AT90S4414/8515 Compatibility Mode ATmega8515(L) 4 The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent ...

Page 5

Pin Descriptions VCC GND Port A (PA7..PA0) Port B (PB7..PB0) Port C (PC7..PC0) Port D (PD7..PD0) Port E(PE2..PE0) RESET XTAL1 XTAL2 2512JS–AVR–10/06 Digital supply voltage. Ground. Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for ...

Page 6

... Resources ATmega8515( comprehensive set of development tools, application notes and datasheets are avail- able for download on http://www.atmel.com/avr. 2512JS–AVR–10/06 ...

Page 7

About Code Examples 2512JS–AVR–10/06 This documentation contains simple code examples that briefly show how to use various parts of the device. These code examples assume that the part specific header file is included before compilation. Be aware that not all ...

Page 8

Register Summary Address Name Bit 7 $3F ($5F) SREG I $3E ($5E) SPH SP15 $3D ($5D) SPL SP7 $3C ($5C) Reserved $3B ($5B) GICR INT1 $3A ($5A) GIFR INTF1 $39 ($59) TIMSK TOIE1 $38 ($58) TIFR TOV1 $37 ($57) SPMCR ...

Page 9

Some of the Status Flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on all bits in the I/O Register, writing a one back into any flag read as ...

Page 10

Instruction Set Summary Description Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...

Page 11

Description Mnemonics Operands DATA TRANSFER INSTRUCTIONS MOV Rd, Rr Move Between Registers MOVW Rd, Rr Copy Register Word LDI Rd, K Load Immediate LD Rd, X Load Indirect LD Rd, X+ Load Indirect and Post-Inc Load ...

Page 12

Description Mnemonics Operands NOP No Operation SLEEP Sleep WDR Watchdog Reset ATmega8515(L) 12 Operation Flags None (see specific descr. for Sleep function) None (see specific descr. for WDR/timer) None #Clocks 2512JS–AVR–10/06 ...

Page 13

Ordering Information Speed (MHz) Power Supply 8 2.7 - 5.5V 16 4.5 - 5.5V Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities.. 2. ...

Page 14

Packaging Information 44A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation ACB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and ...

Page 15

A SEATING PLANE Notes: 1. This package conforms to JEDEC reference MS-011, Variation AC. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). ...

Page 16

X 45˚ 0.51(0.020)MAX 45˚ MAX (3X) Notes: 1. This package conforms to JEDEC reference MS-018, Variation AC. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 ...

Page 17

Marked Pin TOP VIEW BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 1 (SAW Singulation) VKKD-3. 2325 Orchard Parkway San Jose, CA 95131 R 2512JS–AVR–10/ Pin #1 Corner D2 Pin #1 ...

Page 18

Errata ATmega8515(L) Rev. C and D ATmega8515(L) 18 The revision letter in this section refers to the revision of the ATmega8515 device. 1. First Analog Comparator conversion may be delayed If the device is powered by a slow rising VCC, ...

Page 19

Datasheet Revision History Rev. 2512J-10/06 Rev. 2512I-08/06 Rev. 2512H-04/06 Rev. 2512G-03/05 Rev. 2512E-09/03 Rev. 2512E-09/03 Rev. 2512D-02/03 2512JS–AVR–10/06 Please note that the referring page numbers in this section are referring to this docu- ment. The referring revision in this section ...

Page 20

Rev. 2512C-10/02 Rev. 2512B-09/02 Rev. 2512A-04/02 ATmega8515( Added “Using all Locations of External Memory Smaller than 64 KB” on page 31. 2. Removed all TBD. 3. Added description about calibration values for 2, 4, and 8 MHz. 4. ...

Page 21

Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 ...

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