SP3220CA SIPEX [Sipex Corporation], SP3220CA Datasheet - Page 11

• Manufacturer Part Number: SP3220CA
• Description: +3.0V to +5.5V RS-232 Driver/Receiver Pair
• Manufacturer: SIPEX [Sipex Corporation]

Phase 4
— V
connects the negative terminal of C
and transfers this positive generated voltage
across C
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultaneous
with the transfer of the voltage to C
side of capacitor C
negative side is connected to GND, allowing the
charge pump cycle to begin again. The charge
pump cycle will continue as long as the
operational conditions for the internal oscillator
are present.
Since both V
from V
be symmetrical. Older charge pump approaches
that generate V
the magnitude of V
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 250kHz. The external capacitors can
be as low as 0.1µF with a 16V breakdown
voltage rating.
Rev. 6/25/03
Figure 10. Charge Pump — Phase 2
Figure 9. Charge Pump — Phase 1
DD
CC
transfer — The fourth phase of the clock
2
; in a no–load condition V
to C
+
4
, the V
and V
–
from V
1
–
is switched to V
–
compared to V
DD
are separately generated
+
storage capacitor. This
will show a decrease in
C
C
SP3220 True +3.0 to +5.0V RS-232 Transceivers
1
1
–5V
+
–
+
–
V
V
4
CC
CC
, the positive
+
+
and V
= +5V
= +5V
2
CC
due to the
to GND,
and the
–
C
will
C
2
2
+5V
–5V
–10V
+
–
+
–
11
ESD Tolerance
The SP3220 device incorporates ruggedized
ESD cells on all driver output and receiver
input pins. The ESD structure is improved over
our previous family for more rugged applications
and environments sensitive to electro-static
discharges and associated transients.
The Human Body Model has been the generally
accepted ESD testing method for semiconductors.
This method is also specified in MIL-STD-883,
Method 3015.7 for ESD testing. The premise of
this ESD test is to simulate the human body’s
potential to store electro-static energy and
discharge it to an integrated circuit. The
simulation is performed by using a test model as
shown in Figure 14. This method will test the
IC’s capability to withstand an ESD transient
during normal handling such as in manufacturing
areas where the ICs tend to be handled
frequently.
For the Human Body Model, the current
limiting resistor (R
(C
S
+
–
+
) are 1.5kΩ and 100pF, respectively.
–
C
C
C
C
4
4
3
+
+
3
–
–
V
V
V
V
DD
SS
DD
SS
Storage Capacitor
Storage Capacitor
Storage Capacitor
Storage Capacitor
S
) and the source capacitor
© Copyright 2003 Sipex Corporation