71M6543GH MAXIM [Maxim Integrated Products], 71M6543GH Datasheet - Page 83

• Manufacturer Part Number: 71M6543GH
• Description: Selectable Gain of 1 or 8 for One Current Energy Meter ICs Metrology Compensation
• Manufacturer: MAXIM [Maxim Integrated Products]

v1.2
*This pin is sampled every 2 ms and must remain high for 64 ms to be declared a valid high level. This pin is high-
level sensitive.
WF_BADVDD
WF_CSTART
WAKE_ARM
WF_RSTBIT
EW_DIO52
EW_DIO55
WF_DIO52
WF_DIO55
EW_DIOR
WF_DIO4
WF_ERST
WF_TMR
WF_RST
EW_PB
EW_RX
WF_PB
WF_RX
Name
Name
Always Enabled
Always Enabled
Always Enabled
Wake Enable
Location
Location
28B3[2]
28B3[1]
28B3[0]
28B2[5]
28B3[3]
28B3[4]
28B1[2]
28B1[1]
28B1[0]
28B1[5]
28B1[3]
28B1[4]
28B0[6]
28B0[5]
28B0[3]
28B0[7]
28B0[2]
© 2008–2011 Teridian Semiconductor Corporation
WF_BADVDD
WF_CSTART
RST
WF_OVF
0
0
0
0
0
0
0
0
0
0
0
0
*
*
*
*
*
Name
WK
Wake Flag
–
–
–
–
–
–
–
–
–
–
–
–
–
R/W
R/W
R/W
R/W
R/W
R/W
Table 65: Wake Bits
Dir
R
R
R
R
R
R
R
Location
28B0[4]
28B0[7]
28B0[2]
Description
Connects SEGDIO4 to the WAKE logic and permits
SEGDIO4 rising to wake the part. This bit has no effect
unless SEGDIO4 is configured as a digital input.
Connects DIO52 to the WAKE logic and permits DIO52
high level to wake the part. This bit has no effect unless
DIO52 is configured as a digital input.
Connects DIO55 to the WAKE logic and permits DIO55
high level to wake the part. This bit has no effect unless
DIO55 is configured as a digital input.
Arms the WAKE timer and loads it with the value in
WAKE_TMR (I/O RAM 0x2880) register. When SLP or
LCD mode is asserted by the MPU, the WAKE timer
becomes active.
Connects the PB pin to the WAKE logic and permits PB
high level to wake the part. PB is always configured as
an input.
Connects the RX pin to the WAKE logic and permits
RX rising to wake the part. See
issues.
SEGDIO4 flag bit. If SEGDIO4 is configured to wake
the part, this bit is set whenever SEGDIO4 rises. It is
held in reset if SEGDIO4 is not configured for wakeup.
SEGDIO52 flag bit. If SEGDIO52 is configured to wake
the part, this bit is set whenever SEGDIO52 is a high
level. It is held in reset if SEGDIO52 is not configured
for wakeup.
SEGDIO55 flag bit. If SEGDIO55 is configured to wake
the part, this bit is set whenever SEGDIO55 is a high
level. It is held in reset if SEGDIO55 is not configured
for wakeup.
Indicates that the Wake timer caused the part to wake up.
Indicates that the PB pin caused the part to wake.
Indicates that RX pin caused the part to wake.
Indicates that the RST pin, E_RST pin, RESET bit (I/O
RAM 0x2200[3]), the cold start detector, or low voltage
on the VBAT pin caused the part to reset.
*See
Table 66
De-bounce
71M6543F/H and 71M6543G/GH Data Sheet
No
No
No
for details.
Description
Wake after WD reset.
Wake after cold start - the first
application of power.
Wake after insufficient VBAT
voltage.
3.4.1
for de-bounce
83