PEX8614-AA50BC PLX [PLX Technology], PEX8614-AA50BC Datasheet
PEX8614-AA50BC
Manufacturer Part Number
PEX8614-AA50BC
Description
Flexible & Versatile 12-lane 12-port PCI Express Switch
Manufacturer
PLX [PLX Technology]
Datasheet
1.PEX8614-AA50BC.pdf
(4 pages)
Features
PEX 8614 General Features
o 12-lane PCI Express switch
o Up to 12 configurable ports
o 19 x 19mm
o Typical Power: 1.74 Watts
PEX 8614 Key Features
o Standards Compliant
o High Performance
o Dual-Host & Fail-Over Support
o Flexible Configuration
o PCI Express Power Management
o Spread Spectrum Clock Isolation
o Quality of Service (QoS)
o Reliability, Availability, Serviceability
- Integrated 5.0 GT/s SerDes
- PCI Express Base Specification r2.0
- PCI Power Management Spec r1.2
- Microsoft Vista Compliant
- Supports Access Control Services
- Dynamic link-width control
- Non-blocking internal architecture
- Full line rate on all ports
- Cut-Thru latency: 140ns
- 2KB max payload size
- Read Pacing
- Dual Cast
- Configurable Non-Transparent port
- Moveable upstream port
- Crosslink port capability
- 12 flexible & configurable ports
- Configurable with strapping pins,
- Lane and polarity reversal
- Link power management states: L0, L0s,
- Device states: D0 and D3
- Dual clock domain
- Two Virtual Channels (VC) per port
- Eight Traffic Classes per port
- Weighted Round-Robin Port & VC
- All ports Hot-Plug capable thru I
- ECRC & Poison bit support
- Data path protection
- Memory (RAM) error correction
- Advanced Error Reporting support
- Port Status bits and GPIO available
- Per port error diagnostics
- Performance monitoring
- JTAG AC/DC boundary scan
- Fatal Error (FATAL_ERR#) output signal
-
(Backwards compatible with PCIe
r1.0a/1.1)
(intelligent bandwidth allocation)
(NTB)
(x1 or x4)
EEPROM, I
L1, L2/L3 Ready, and L3
Arbitration
(Hot-Plug Controller on every port)
(per port payload & header counters)
INTA# output signal
Version 1.2 2009
2
, 324-ball HSBGA
2
C, or Host software
hot
2
C
The ExpressLane
enabling users to add scalable high bandwidth non-blocking interconnection to a
wide variety of applications including control planes, communications platforms,
servers, storage systems and embedded systems. The PEX 8614 is well suited for
fan-out, aggregation, peer-to-peer, and intelligent I/O module applications
Low Packet Latency & High Performance
The PEX 8614 architecture supports packet cut-thru with a maximum latency of
140ns in x4 to x1 configuration. This, combined with large packet memory and
non-blocking internal switch architecture, provides full line rate on all ports for low-
latency applications such as communications and servers. The low latency enables
applications to achieve high throughput and performance. In addition to low latency,
the device supports a max payload size of 2048 bytes, enabling the user to achieve
even higher throughout
Data Integrity
The PEX 8614 provides end-to-end CRC protection (ECRC) and Poison bit support
to enable designs that require guaranteed error-free packets. PLX also supports
data path parity and memory (RAM) error correction as packets pass through the
switch
Dual-Host and Fail-Over Support
The PEX 8614 supports full non-transparent bridging (NTB) functionality to allow
implementation of multi-host systems and intelligent I/O modules in applications
which require redundancy support such as communications, storage, and servers.
Non-transparent bridges allow systems to isolate host memory domains by
presenting the processor subsystem as an endpoint rather than another memory
system. Base address registers are used to translate addresses, doorbell registers are
used to send interrupts between the address domains, and scratchpad registers are
accessible from both address domains to allow inter-processor communication
Interoperability
The PEX 8614 is designed to be fully compliant with the PCI Express Base
Specification r2.0 and is backwards compatible to PCI Express Base Specification
r1.1 and r1.0a. Additionally each port supports auto-negotiation, lane reversal and
polarity reversal. Furthermore, the PEX 8614 is designed for Microsoft Vista
compliance. All PLX switches undergo thorough interoperability testing in PLX’s
Interoperability Lab and compliance testing at the PCI-SIG plug-fest to ensure
compatibility with PCI Express devices in the market.
Device Operation Configuration Flexibility
The PEX 8614 provides several ways to configure its operations. The device can be
configured through strapping pins, I
optional serial EEPROM. This allows for easy debug during the development phase
and functional monitoring during the operation phase
Flexible & Versatile 12-lane 12-port PCI Express
.
PEX 8614
™
PEX 8614 device offers PCI Express switching capability
.
2
C interface, CPU configuration cycles and/or an
.
®
Switch
.
.
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PEX8614-AA50BC Summary of contents
Page 1
Version 1.2 2009 Features PEX 8614 General Features o 12-lane PCI Express switch - Integrated 5.0 GT/s SerDes configurable ports 19mm , 324-ball HSBGA o Typical Power: 1.74 Watts PEX 8614 Key ...
Page 2
Flexible Port Configurations The PEX 8614 flexible architecture supports a number of port configurations as required by the target applications as shown in figure 1 below. Figure 1. Port Configurations Hot-Plug for High Availability Hot-Plug capability allows users to replace ...
Page 3
PEX 8614 connecting the Control Processor to as many as eleven line cards each via an x1 connection. This usage model provides connectivity to multiple line cards giving the processor control over a large ...
Page 4
... Rapid Development Kit (RDK), hardware documentation, and a Software Development Kit (also available at www.plxtech.com/sdk). Figure 8. PEX 8614RDK Product Ordering Information Part Number PEX8614-AA50BC PEX8614-AA50BC G PLX Technology, Inc. 870 W. Maude Ave. PEX 8614AA-BB4U1D RDK Sunnyvale, CA 94085 USA Tel: 1-800-759-3735 PEX 8614AA-AIC4U4D RDK Tel: 1-408-774-9060 ...