A29L008ATV-70 AMICC [AMIC Technology], A29L008ATV-70 Datasheet

Page 1

Document Title Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory Revision History Rev. No. History 0.0 Initial issue 1.0 Final version release (October, 2006, Version 1.0) A29L008A Series Bit CMOS 3.0 Volt-only, Boot Sector ...

Page 2

Features Single power supply operation - Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications Access times: - 70/90 (max.) Current typical active read current - 20 mA typical program/erase current - ...

Page 3

The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The A29L008A is fully erased when shipped from the ...

Page 4

Block Diagram RY/BY VCC VSS RESET State WE Control BYTE Command Register CE OE VCC Detector A0-A19 Pin Descriptions (October, 2006, Version 1.0) Sector Switches Erase Voltage Generator PGM Voltage Generator STB Timer Pin No A19 Address Inputs ...

Page 5

Absolute Maximum Ratings* Storage Temperature Plastic Packages . . . . . .0° 70° ……. .. for -U series: ...

Page 6

Requirements for Reading Array Data To read array data from the outputs, the system must drive the CE and OE pins the power control and IL selects the device the output control and ...

Page 7

Table 2. A29L008A Top Boot Block Sector Address Table Sector A19 A18 SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 1 SA5 0 1 SA6 0 1 SA7 0 1 SA8 1 0 SA9 ...

Page 8

Autoselect Mode The autoselect mode provides manufacturer and device identification, and sector protection verification, through identifier codes output on I/O - I/O 7 intended for programming equipment to automatically match a device to be programmed with its corresponding programming algorithm. ...

Page 9

Sector Protection/Unprotection The hardware sector protection feature disables both program and erase operations in any sector. The hardware sector unprotection feature re-enables both program and erase operations in previously protected sectors possible to determine whether a sector is ...

Page 10

START PLSCNT=1 RESET=V Wait Temporary Sector First Write Unprotect Mode Cycle=60h? Yes Set up sector address Sector Protect Write 60h to sector address with A6=0, A1=1, A0=0 Wait 150 us Verify Sector Protect: Write 40h to sector ...

Page 11

Command Definitions Writing specific address and data commands or sequences into the command register initiates device operations. The Command Definitions table defines the valid register command sequences. Writing incorrect address and data values or writing them in the improper sequence ...

Page 12

START Write Program Command Sequence Data Poll from System Embedded Program algorithm in progress Verify Data ? Increment Address Last Address ? Programming Completed Note : See the appropriate Command Definitions table for program command sequence. Figure 3. Program Operation ...

Page 13

The system can monitor I/O to determine if the sector erase 3 timer has timed out. (See the " I/O section.) The time-out begins from the rising edge of the final WE pulse in the command sequence. Once the sector ...

Page 14

Command Sequence (Note 1) Read (Note 5) Reset (Note 6) Manufacturer ID Device ID, Top Boot Block Device ID, Bottom Boot Block Continuation ID Sector Protect Verify (Note 8) Program Unlock Bypass Unlock Bypass Program (Note 9) Unlock Bypass Reset ...

Page 15

Write Operation Status Several bits, I/O , I/O , I/O , I the A29L008A to determine the status of a write operation. Table 6 and the following subsections describe the functions of these ...

Page 16

BY : Read/ Busy RY/ The RY dedicated, open-drain output pin that indicates whether an Embedded algorithm is in progress or BY complete. The RY/ status is valid after the rising edge of the final WE pulse ...

Page 17

I/O : Sector Erase Timer 3 After writing a sector erase command sequence, the system may read I/O to determine whether or not an erase 3 operation has begun. (The sector erase timer does not apply to the chip erase ...

Page 18

Operation Standard Embedded Program Algorithm Mode Embedded Erase Algorithm Erase Reading within Erase Suspend Suspended Sector Mode Reading within Non-Erase Suspended Sector Erase-Suspend-Program Notes: 1. I/O and I/O require a valid address when reading status information. Refer to the appropriate ...

Page 19

DC Characteristics CMOS Compatible (T =0°C to 70°C or -40°C to +85°C) A Parameter Parameter Description Symbol I Input Load Current Input Load Current LIT I Output Leakage Current LO I VCC Active Read Current CC1 (Notes ...

Page 20

DC Characteristics (continued) Zero Power Flash 500 Note: Addresses are switching at 1MHz I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ° ...

Page 21

AC Characteristics Read Only Operations (T =0°C to 70°C or -40°C to +85°C) A Parameter Symbols JEDEC Std Read Cycle Time (Note AVAV RC Address to Output Delay t t AVQV ACC t t Chip Enable to ...

Page 22

AC Characteristics Hardware Reset ( RESET ) (T =0°C to 70°C or -40°C to +85°C) A Parameter JEDEC Std RESET Pin Low (During Embedded t READY Algorithms) to Read or Write (See Note) RESET Pin Low (Not During Embedded t ...

Page 23

Temporary Sector Unprotect (T Parameter JEDEC Std t V Rise and Fall Time (See Note) VIDR ID RESET Setup Time for Temporary Sector t RSP Unprotect Note: Not 100% tested. Temporary Sector Unprotect Timing Diagram 12V RESET ...

Page 24

AC Characteristics Erase and Program Operations (T Parameter JEDEC Std t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH DS ...

Page 25

Timing Waveforms for Program Operation Program Command Sequence (last two cycles Addresses 555h Data RY/BY t VCS VCC Note : program addrss program data, Dout is the true ...

Page 26

Timing Waveforms for Chip/Sector Erase Operation Erase Command Sequence (last two cycles Addresses 2AAh Data RY/BY t VCS VCC Note : Sector Address (for Sector Erase Valid Address ...

Page 27

Timing Waveforms for Data Polling (During Embedded Algorithms) Addresses VA t ACC OEH WE I/O 7 I/O - I/O High BUSY RY/BY Note : VA = Valid Address. Illustation shows ...

Page 28

Timing Waveforms for Toggle Bit (During Embedded Algorithms) Addresses VA t ACC OEH WE I/O , I/O High BUSY RY/BY Note Valid Address; not required for I/O read ...

Page 29

Timing Waveforms for I/O vs. I/O 2 Enter Erase Embedded Suspend Erasing WE Erase I/O 6 I/O 2 I/O and I/O 2 Note : Both I/O and I/O toggle with OE or CE. See the text on I ...

Page 30

Timing Waveforms for Alternate CE Controlled Write Operation 555 for program 2AA for erase Addresses Data for program 55 for erase RESET RY/BY Note : Program Address, ...

Page 31

Latch-up Characteristics Input Voltage with respect to VSS on all I/O pins VCC Current Input voltage with respect to VSS on all pins except I/O pins (including A9, OE and RESET ) Includes all pins except VCC. Test conditions: VCC ...

Page 32

Test Conditions Test Specifications Test Condition Output Load Output Load Capacitance, C (including jig capacitance) L Input Rise and Fall Times Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels Test Setup Device Under Test (October, ...

Page 33

... Ordering Information Top Boot Sector Flash Part No. Access Time (ns) A29L008ATV-70 70 A29L008ATV-70F A29L008ATV-90 A29L008ATV-90F 90 A29L008ATV-90U A29L008ATV-90UF Bottom Boot Sector Flash Part No. Access Time (ns) A29L008AUV-70 70 A29L008AUV-70F A29L008AUV-90 A29L008AUV-90F 90 A29L008AUV-90U A29L008AUV-90UF (October, 2006, Version 1.0) Active Read Program/Erase Current Current Typ. (mA) Typ. (mA Active Read ...

Page 34

Package Information TSOP 40L TYPE I (10 X 20mm) Outline Dimensions Pin1 Symbol Notes: 1. Dimension D 2. The lead width dimension does not include dambar protrusion. (October, 2006, Version 1. Detail "A" Dimensions in inches Min ...