AS7C1025A ALSC [Alliance Semiconductor Corporation], AS7C1025A Datasheet - Page 2

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AS7C1025A

Manufacturer Part Number
AS7C1025A
Description
5V/3.3V 128K X 8 CMOS SRAM (Revolutionary pinout)
Manufacturer
ALSC [Alliance Semiconductor Corporation]
Datasheet
Functional description
The AS7C1025A and AS7C31025A are high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) devices organized as
131,072 x 8 bits. They are designed for memory applications where fast data access, low power, and simple interfacing are desired.
Equal address access and cycle times (t
high-performance applications. The chip enable input CE permits easy memory and expansion with multiple-bank memory systems.
When CE is high the devices enter standby mode. The standard AS7C1025A is guaranteed not to exceed 55 mW power consumption in
standby mode. Both devices also offer 2.0V data retention.
A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O0-I/O7 is written on the rising
edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after outputs have been
disabled with
A read cycle is accomplished by asserting output enable (OE) and chip enable (CE), with write enable (WE) high. The chips drive I/O pins
with the data word referenced by the input address. When either chip enable or output enable is inactive, or write enable is active, output
drivers stay in high-impedance mode.
All chip inputs and outputs are TTL-compatible, and operation is from a single 5V supply (AS7C1025A) or 3.3V supply (AS7C31025A). The
AS7C1025A and AS7C31025A are packaged in common industry standard packages.
Absolute maximum ratings
NOTE: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional oper-
ation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
Truth table
Key: X = Don’t Care, L = Low, H = High
Voltage on V
Voltage on any pin relative to GND
Power dissipation
Storage temperature (plastic)
Ambient temperature with V
DC current into outputs (low)
2/6/01; V.0.9
CE
H
L
L
L
output enable (
CC
relative to GND
Parameter
WE
OE
H
H
X
L
) or write enable
CC
applied
AA
, t
RC
(WE).
, t
OE
H
X
X
L
WC
) of 10/12/15/20 ns with output enable access times (t
Alliance Semiconductor
AS7C1025A
AS7C31025A
Device
High Z
High Z
D
Data
D
OUT
®
IN
Symbol
T
I
T
V
V
V
OUT
P
bias
stg
t1
t1
t2
D
–0.50
–0.50
–0.50
Min
–65
–55
Output disable (I
OE
Standby (I
) of 3/3/4/5 ns are ideal for
Write (I
Read (I
V
CC
Mode
+150
+125
+7.0
+5.0
Max
1.0
20
+ 0.5
AS7C31025A
SB
CC
AS7C1025A
CC
, I
)
)
SB1
CC
P. 2 of 8
)
)
Unit
mA
o
o
W
V
V
V
C
C

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