ISD2100 Nuvoton Technology, ISD2100 Datasheet

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ISD2100

Manufacturer Part Number
ISD2100
Description
Digital ChipCorder
Manufacturer
Nuvoton Technology
Datasheet
ISD2100 DATASHEET
ISD2100
Digital ChipCorder
with
Multi Time Programming and Digital Audio Interface
Publication Release Feb 9, 2010
- 1 -
Revision 0.51

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ISD2100 Summary of contents

Page 1

... Multi Time Programming and Digital Audio Interface ISD2100 Digital ChipCorder with - 1 - ISD2100 DATASHEET Publication Release Feb 9, 2010 Revision 0.51 ...

Page 2

... FEATURES ...................................................................................................................................... 3 3 BLOCK DIAGRAM ........................................................................................................................... 4 4 PINOUT CONFIGURATION ............................................................................................................ 5 5 PIN DESCRIPTION .......................................................................................................................... 6 6 SPI INTERFACE .............................................................................................................................. 7 7 ANALOG AND DIGITAL SIGNAL PATH ........................................................................................ 10 7.1.1 PWM Speaker Driver ..................................................................................................................... 10 7.1.2 Internal Oscillator ......................................................................................................................... 10 8 ISD2100 MEMORY MANAGEMENT ............................................................................................. 10 8 ESSAGE ANAGEMENT 8.1.1 Voice Prompts ................................................................................................................................ 10 8.1.2 Voice Macros ................................................................................................................................. 10 8.1.3 GPIO Voice Trigger Macros: ........................................................................................................ 11 9 ELECTRICAL CHARACTERISTICS .............................................................................................. 12 9.1 O ...

Page 3

... Unlike the MLS ChipCorder series, this device provides higher sampling frequency and a signal path with SNR equivalent to 12-bit resolution. The ISD2100 can take digital audio data via SPI interface. When SPI interface is chosen, the sample rate of the audio data sent must be one of the ISD2100 supported sample rates. ...

Page 4

... Interface GPIO 3 / INTB GPIO 4 / RDY / BSYB GPIO 5 Digital Signal Path Digital Filters Re - sampling Volume Control De - Compression Memory Management and Command Flash Memory Interpreter Controller Figure 3-1 ISD2100 Block Diagram - 4 - ISD2100 DATASHEET : PWM Control Flash Memory Publication Release Feb 9, 2010 Revision 0.51 SPK + SPK - ...

Page 5

... PINOUT CONFIGURATION 4 MISO / GPIO2 1 2 SCLK / GPI1 SSB 3 4 MOSI / GPIO0 5 V SSD Figure 4-1 ISD2100 20-Lead QFN Pin Configuration. ISD2100 DATASHEET ISD2100 ISD2130 QFN- GPIO5 14 V CCD RDY/BSYB / GPIO4 11 INTB / GPIO3 Publication Release Feb 9, 2010 ...

Page 6

... Serial Clock input to the ISD2100 from the host. Can be configured as a general purpose input pin. Slave Select input to the ISD2100 from the host. When SSB is low device is selected and responds to commands on the SPI interface. Master-Out-Slave-In. Serial input to the ISD2100 from the host. ...

Page 7

... MOSI), and a data output (Master In Slave Out - MISO). In addition, for some transactions requiring data flow control, a RDY/BSYB signal (pin) is available. The ISD2100 supports SPI mode 3: (1) SCLK must be high when SPI bus is inactive, and (2) data is sampled at SCLK rising edge. A SPI transaction begins on the falling edge of SSB and its waveform is ...

Page 8

... RDY/BSYB pin and take the necessary actions. The INT pin will go low to indicate (1) data overrun/overflow when sending data to the ISD2100; or (2) invalid data from ISD2100. See Figure 6-3 for the timing diagram. ...

Page 9

... SSB SCLK RDY/BSYB =1 MISO RDY INT FULL X MOSI INT Figure 6-3 SPI Transaction Ignoring RDY/BSYB ISD2100 DATASHEET BUF CMD PD RDY INT FULL X BSY FUL BSY ...

Page 10

... ISD2100 MEMORY MANAGEMENT 8 The ISD2100 employs several memory management techniques to make audio playback transparent to the host controller. The address space of the ISD2100 starts at address zero of the internal memory. 8 ...

Page 11

... GPIO Voice Trigger Macros: The ISD2100 GPIO flexibility allows the user to configure the device to triggers a voice macro in many different combinations for a push button application. Below is some possible configuration of the GPIO pins using Voice trigger macros? 1. Single Hi-Low trigger sequence through messages A high to low trigger on any GPIO 0~ 5 will start to play Voice Macro and back to Voice Macro 3 ...

Page 12

... R 4 L(SPK) =3V, T =25°C unless otherwise stated [1] MIN TYP 0.7xV ISD2100 DATASHEET VALUES -40°C to +85°C +2.7V to +3. 3.6V (V –0.3V +0.3V MAX UNITS CONDITIONS +1% MHz Vdd = 3V. At room temperature [1] TYP MAX UNITS CONDITIONS Load 150Ω ...

Page 13

... OH1 =3V, T =25°C unless otherwise stated SCK T SCKH T SCKL T MOS T MOH T MID T CRBD Figure 11-1 SPI Timing - 13 - ISD2100 DATASHEET 1mA -1mA Load 10 µ 3.6V DD ±1 µA Force SSBHI T SSBH T T MIZD ...

Page 14

... Delay Time from SSB Rising Edge to MISO Tri-state MIZD T Delay Time from SCLK Falling Edge to MISO MID T Delay Time from SCLK Rising Edge to RDY/BSYB CRBD Falling Edge T Delay Time from RDY/BSYB Rising Edge to SCLK RBCD Falling Edge ISD2100 DATASHEET st SCLK Falling Edge Setup - 14 - MIN TYP MAX UNIT --- --- ...

Page 15

... Data flow control 12 Figure 12-1 ISD2100 Application Diagram The above application examples are for references only. It makes no representation or warranty that such applications shall be suitable for the use specified. Each design has to be optimized in its own system for the best performance on voice quality, current consumption, functionalities and etc ...

Page 16

... PACKAGE SPECIFICATION 11 11 QFN EAD ISD2100 DATASHEET Publication Release Feb 9, 2010 - TTO Revision 0.51 ...

Page 17

... ORDERING INFORMATION 12 Duration 30: 30 Seconds * Based on 8kHz/4bit ADPCM ISD2100 DATASHEET I21XX Tape and Reel Temperature I: Industrial -40°C to 85°C Package Option Y: green Package Type Y: 20L-QFN Publication Release Feb 9, 2010 - 17 - Revision 0.51 ...

Page 18

... REVISION HISTORY 13 Version Date 0.2 Jan 29, 2009 0.45 August 5, 2009 0.46 November 11, 2009 0.48 January 9, 2010 0.51 Feb 4, 2010 ISD2100 DATASHEET Description Initial draft. Add Wake-Up VM description Add Checksum Description Simplify all Block diagrams Update description Publication Release Feb 9, 2010 - 18 - Revision 0.51 ...

Page 19

... FAX: 81-45-4781800 Please note that all data and specifications are subject to change without notice. All the trademarks of products and companies mentioned in this datasheet belong to their respective owners. All rights reserved. ChipCorder CA 95134, U.S. ISD2100 DATASHEET ® ChipCorder ® ® and ISD are trademarks of Nuvoton Technology (Shanghai) Ltd ...

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