Z86C93 Zilog., Z86C93 Datasheet

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Z86C93

Manufacturer Part Number
Z86C93
Description
CMOS Z8 MULT/DIV MICROCONTROLLER
Manufacturer
Zilog.
Datasheet

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GENERAL DESCRIPTION
The Z86C93 is a CMOS ROMless Z8 microcontroller en-
hanced with a hardwired 16-bit x 16-bit multiplier,
32-bit/16-bit divider, and three 16-bit counter timers (see
Functional Block Diagram). A capture register and a fast
decrement mode are also provided. It is offered in 40-pin
PDIP, 44-pin PLCC, 44-pin QFP, and 48-pin VQFP pack-
ages. The Z86C93 is functionally compatible with the
Z86C91, yet it offers a more powerful mathematical capa-
bility. In the PDIP package, the Z86C93 is fully pin compat-
ible with the Z86C91. In the PLCC package, the Z86C93 is
also pin compatible to the Z86C91, with the addition of four
signals (SCLK, /IACK, /SYNC, and /WAIT). The /WAIT
signal is only available on the 25 MHz and 33 MHz devices.
The Z86C93 provides up to 16 output address lines permit-
ting an address space of up to 64 Kbytes of data and
program memory each. Eight address outputs (AD7-AD0)
are provided by a multiplexed, 8-bit, Address/Data bus.
The remaining 8 bits can be provided by the software
configuration of Port 0 to output address bits A15-A8.
DC-4020-12
(2-16-94)
C
Z86C93
CMOS Z8
M
There are 256 registers located on chip and organized as
236 general-purpose registers, 16 control and status reg-
isters, one reserved register, and up to three I/O port
registers. The register file can be divided into 16 groups of
16 working registers each. Configuration of the registers in
this manner allows the use of short format instructions; in
addition, any of the individual registers can be accessed
directly. There are an additional 17 registers implemented
in the Expanded Register File in Banks D and E. Two of the
registers may be used as general-purpose registers, while
15 registers supply the data and control functions for the
Multiply/Divide Unit and additional Counter/Timer blocks.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
USTOMER
ICROCONTROLLER
Connection
Ground
Power
P
®
ROCUREMENT
M
ULT
/D
Circuit
GND
IV
V
CC
S
PECIFICATION
CPS DC-4020-12
Device
V
V
DD
SS
1

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Z86C93 Summary of contents

Page 1

... Z86C91, yet it offers a more powerful mathematical capa- bility. In the PDIP package, the Z86C93 is fully pin compat- ible with the Z86C91. In the PLCC package, the Z86C93 is also pin compatible to the Z86C91, with the addition of four signals (SCLK, /IACK, /SYNC, and /WAIT). The /WAIT signal is only available on the 25 MHz and 33 MHz devices ...

Page 2

... Counter/Timers 32 16 Divider Multiplier Interrupt Control Port 2 I/O (Bit Programmable) 2 VCC GND Machine Timing, Emulation and Instruction Control ALU FLAGS Register Pointer Program Register File Counter 256 x 8-Bit Port Address or I/O Address/Data (Nibble Programmable) Functional Block Diagram Z86C93 CPS DC-4020-12 Port 1 8 ...

Page 3

... P16 29 P15 44-Pin PLCC Package (20 MHz Z86C93 19 MCU 48-Pin VQFP Package (20 MHz) Z86C93 /SYNC P14 P13 P12 P11 P10 P07 NC P06 P05 P04 P03 3 ...

Page 4

... MHz and 33 MHz Z86C93 19 MCU 48-Pin VQFP Package (25 MHz and 33 MHz) Z86C93 P17 P16 P15 /SYNC P14 P13 P12 P11 P10 P07 NC P06 P05 P04 P03 ...

Page 5

... C tions of these specifications is not implied. Exposure to † † C absolute maximum rating conditions for an extended pe- riod may affect device reliability. DUT Device Under T est CPS DC-4020- Commutation Test Load Diagram Z86C93 5 ...

Page 6

... Driven by External Clock Generator V Driven by External Clock Generator –1 –100 +1 Test at 0V Test at 0V MHz [1] mA HALT Mode MHz [ STOP Mode V = OV Z86C93 ...

Page 7

... Test at 0V Test at 0V MHz [ MHz [ MHz [1] mA HALT Mode MHz [ HALT Mode MHz [ HALT Mode MHz [ STOP Mode V = OV Z86C93 7 ...

Page 8

... AC CHARACTERISTICS External Memory Read/Write Timing Diagram R/W, / Port 0 Port 1 /AS 4 /DS (Read) 1 Port1 /DS (Write A15 External Memory Read/Write Timing CPS DC-4020- OUT 15 7 Z86C93 A0-A7 ...

Page 9

... Z86C93 CPS DC-4020-12 Units ...

Page 10

... XTAL1 (External Clock Drive) 22 SCLK /DS DSR (READ) /DS DSW (Write) T1 XTAL1 SCLK /AS /DS /WAIT XTAL/SCLK To DSR and DSW Timing XTAL/SCLK To WAIT Timing (25 MHz and 33 MHz Devices Only) Z86C93 CPS DC-4020- ...

Page 11

... Min Max Min Max Min 30 1000 42 1000 TpC 3 TpC 8 TpC 8 TpC 100 100 TpC 3 TpC CPS DC-4020- MHz Max Units Notes 50 1000 [2] 3 TpC [2] 8 TpC [2] 100 ns [ [2,4] 5 TpC [2,5] 3 TpC [2,3] Z86C93 11 ...

Page 12

... Data In Valid 1 /DAV (Input) RDY (Output) Data Out 7 /DAV (Output) RDY (Input Delayed DAV 4 Input Handshake Timing Data Out Valid Output Handshake Timing CPS DC-4020-12 Next Data In Valid 5 6 Delayed RDY Next Data Out Valid Delayed DAV 11 Delayed RDY Z86C93 ...

Page 13

... Zilog, Inc. 210 East Hacienda Ave. Campbell, CA 95008-6600 Telephone (408) 370-8000 Telex 910-338-7621 FAX 408 370-8056 Z86C93 CPS DC-4020-12 Data Direction ...

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