W49F002 Winbond, W49F002 Datasheet - Page 3

• Manufacturer Part Number: W49F002
• Description: 256K X 8 CMOS FLASH MEMORY
• Manufacturer: Winbond

W49F002U
FUNCTIONAL DESCRIPTION
Read Mode
The read operation of the W49F002U is controlled by CE and OE, both of which have to be low for
the host to obtain data from the outputs. CE is used for device selection. When CE is high, the chip
is de-selected and only standby power will be consumed. OE is the output control and is used to gate
data from the output pins. The data bus is in high impedance state when either CE or OE is high.
Refer to the timing waveforms for further details.
Reset Operation
The reset input pin can be used in some application. When RESET pin is at high state, the device is
in normal operation mode. When RESET pin is at low state, it will halts the device and all outputs are
at high impedance state. As the high state re-asserted to the RESET pin, the device will return to
read or standby mode, it depends on the control signals. When the system drives the RESET pin low
for at least a period of 500 nS, the device immediately terminates any operation in progress duration
of the RESET pulse. The other function for RESET pin is temporary reset the boot block. By
applying the 12V to RESET pin, the boot block can be reprogrammed even though the boot block
lockout function is enabled.
Boot Block Operation
There is one 16K-byte boot block in this device, which can be used to store boot code. It is located in
the last 16K bytes with the address range of the boot block is 3C000(hex) to 3FFFF(hex).See
Command Code sequence for Boot Block Lockout Enable for the specific code. Once this feature is
set the data for the designated block cannot be erased or programmed (programming lockout); other
memory locations can be changed with the regular programming method. Once the boot block
programming lockout feature is activated, the chip erase function can no longer erase the boot block.
There is one condition that the lockout feature can be overridden. Just apply 12V to RESET pin, the
lockout feature will temporarily be inactivated and the block can be erased/programmed. Once the
RESET pin return to TTL level, the lockout feature will be activated again.
In order to detect whether the boot block feature is set on the 16K-bytes block, users can perform
software command code sequence: enter the product identification mode (see Command Codes for
Identification/Boot Block Lockout Detection for specific code), and then read from address "0002
(hex)". If the DQ
of output data is "1," the boot block programming lockout feature is activated; if the
0
of
output data is "0 ," the lockout feature is inactivated and the block can be
DQ0
erased/programmed.
To return to normal operation, perform a three-byte command code sequence (or an alternate single-
byte command) to exit the identification mode. For the specific code, see Command Code for
Identification/Boot Block Lockout Detection.
Chip Erase Operation
The chip-erase mode can be initiated by a six-byte command code sequence. After the command
loading cycle, the device enters the internal chip erase mode, which is automatically timed and will be
completed as fast as 100 mS (typical). The host system is not required to provide any control or
timing during this operation. The entire memory array will be erased to FF hex. by the chip erase
Publication Release Date: April 2000
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Revision A2