74LS

Manufacturer Part Number74LS
DescriptionSYNCHRONOUS 4-BIT UP/DOWN COUNTER
ManufacturerON Semiconductor
74LS datasheet
 
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SYNCHRONOUS 4-BIT
UP/DOWN COUNTER
The SN54 / 74LS669 is a synchronous 4-bit up/down counter. The LS669 is
a 4-bit binary counter. For high speed counting applications, this presettable
counter features an internal carry lookahead for cascading purposes. By
clocking all flip-flops simultaneously so the outputs change coincident with
each other (when instructed to do so by the count enable inputs and internal
gating) synchronous operation is provided. This helps to eliminate output
counting spikes, normally associated with asynchronous (ripple-clock) count-
ers. The four master-slave flip-flops are triggered on the rising (positive-going)
edge of the clock waveform by a buffered clock input.
Circuitry of the load inputs allows loading with the carry-enable output of the
cascaded counters. Because loading is synchronous, disabling of the counter
by setting up a low level on the load input will cause the outputs to agree with
the data inputs after the next clock pulse.
Cascading counters for N-bit synchronous applications are provided by the
carry look-ahead circuitry, without additional gating. Two count-enable inputs
and a carry output help accomplish this function. Count-enable inputs (P and
T) must both be low to count. The level of the up-down input determines the
direction of the count. When the input level is low, the counter counts down,
and when the input is high, the count is up. Input T is fed forward to enable the
carry output. The carry output will now produce a low level output pulse with a
duration
equal to the high portion of the Q A output when counting up and
when counting down equal to the low portion of the Q A output. This low level
carry pulse may be utilized to enable successive cascaded stages. Regard-
less of the level of the clock input, transitions at the P or T inputs are allowed.
By diode-clamping all inputs, transmission line effects are minimized which
allows simplification of system design.
Any changes at control inputs (ENABLE P, ENABLE T, LOAD, UP/ DOWN)
will have no effect on the operating mode until clocking occurs because of the
fully independant clock circuits. Whether enabled, disabled, loading or count-
ing, the function of the counter is dictated entirely by the conditions meeting
the stable setup and hold times.
Programmable Look-Ahead Up/ Down Binary/ Decade Counters
Fully Synchronous Operation for Counting and Programming
Internal Look-Ahead for Fast Counting
Carry Output for n-Bit Cascading
Fully Independent Clock Circuit
Buffered Outputs
CONNECTION DIAGRAM (TOP VIEW)
OUTPUTS
RIPPLE
ENABLE
CARRY
T
V CC
OUTPUT Q A
Q B
Q C
Q D
LOAD
16
15
14
13
12
11
10
RIPPLE
Q A
Q B
Q C
Q D
ENABLE
CARRY
T
OUTPUT
LOAD
UP/DOWN
ENABLE
CK
A
B
C
D
P
1
2
3
4
5
6
7
U/D
CK
A
B
C
D ENABLE
GND
P
DATA INPUTS
FAST AND LS TTL DATA
5-1
SN54/74LS669
SYNCHRONOUS 4-BIT
UP/DOWN COUNTER
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
CASE 620-09
16
1
N SUFFIX
PLASTIC
CASE 648-08
16
1
D SUFFIX
SOIC
16
CASE 751B-03
1
ORDERING INFORMATION
SN54LSXXXJ
Ceramic
SN74LSXXXN
Plastic
SN74LSXXXD
SOIC
9
8

74LS Summary of contents

  • Page 1

    ... SYNCHRONOUS 4-BIT UP/DOWN COUNTER The SN54 / 74LS669 is a synchronous 4-bit up/down counter. The LS669 is a 4-bit binary counter. For high speed counting applications, this presettable counter features an internal carry lookahead for cascading purposes. By clocking all flip-flops simultaneously so the outputs change coincident with each other (when instructed the count enable inputs and internal gating) synchronous operation is provided ...

  • Page 2

    ... (14) (13) GUARANTEED OPERATING RANGES Symbol Parameter V CC Supply Voltage T A Operating Ambient Temperature Range I OH Output Current — High I OL Output Current — Low SN54/74LS669 LOGIC DIAGRAM (5) DATA DATA (12) Min 54 4.5 74 4.75 54 – ...

  • Page 3

    ... S Symbol b l Parameter Clock Pulse Width t s Data Setup Time t s Enable Setup Time t s Load Setup Time t s U/D Setup Time t h Hold Time, Any Input SN54/74LS669 (unless otherwise specified) Limits Min Typ Max U i Unit 2 0 0.8 – 0.65 – 1.5 ...

  • Page 4

    ... SN54/74LS669 PARAMETER MEASUREMENT INFORMATION t w(clock) t w(clock) CLOCK 1.3 V 1.3 V INPUT LOAD 1.3 V INPUT DATA INPUTS 1.3 V A,B,C, and D ENABLE P or ENABLE T UP/DOWN INPUT VOLTAGE WAVEFORMS ENABLE T 1.3 V INPUT t PHL RIPPLE 1.3 V CARRY OUTPUT FAST AND LS TTL DATA 1 1 1.3 V ...