AM29LV001B AMD [Advanced Micro Devices], AM29LV001B Datasheet

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... PRELIMINARY Am29LV001B 1 Megabit (128 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS Single power supply operation — Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications — Regulated voltage range: 3.0 to 3.6 volt read and write operations and for compatibility with high performance 3.3 volt microprocessors Manufactured on 0.35 µ ...

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... GENERAL DESCRIPTION The Am29LV001B Mbit, 3.0 Volt-only Flash memory device organized as 131,072 bytes. The Am29LV001B has a boot sector architecture. The device is offered in 32-pin PLCC and 32-pin TSOP packages. The byte-wide (x8) data appears on DQ7– DQ0. All read, erase, and program operations are accomplished using only a single power supply ...

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... =3.0–3.6 V -45R CC = 2.7–3 Sector Switches Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic STB Timer Am29LV001B Am29LV001B -55 -70 - – DQ0 DQ7 Input/Output Buffers Data STB Latch ...

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... PLCC Am29LV001 DQ0 Am29LV001B OE# 32 A10 31 CE# 30 DQ7 29 28 DQ6 27 DQ5 26 DQ4 25 DQ3 DQ2 DQ1 22 DQ0 A11 32 ...

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... Hardware reset pin, active low V = 3.0 volt-only single power supply CC (see Product Selector Guide for speed options and voltage supply tolerances Device ground Pin not connected internally LOGIC SYMBOL 17 A0–A16 CE# OE# WE# RESET# Am29LV001B 8 DQ0–DQ7 21557C-3 ...

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... Am29LV001B T -45R Valid Combinations Am29LV001BT-45R, Am29LV001BB-45R, Am29LV001BT-55, Am29LV001BB-55, Am29LV001BT-70, Am29LV001BB-70, Am29LV001BT-90, Am29LV001BB-90 OPTIONAL PROCESSING Blank = Standard Processing B = Burn-in (Contact an AMD representative for more information) TEMPERATURE RANGE C = Commercial (0°C to +70° Industrial (– ...

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... The command register it- self does not occupy any addressable memory loca- tion. The register is composed of latches that store the commands, along with the address and data informa- tion needed to execute the command. The contents of Table 1. Am29LV001B Device Bus Operations Operation CE# Read Write ...

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... Refer to the “Standby Mode” section for more in- formation. Refer to the AC Characteristics tables for RESET# pa- rameters and to Figure 14 for the timing diagram. Output Disable Mode When the OE# input disabled. The output pins are placed in the high imped- ance state. Am29LV001B + 30 ACC in the DC CC5 , the RP ±0.3 V, the device SS ) ...

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... Table 2. Am29LV001B Top Boot Sector Architecture Sector A16 SA0 0 SA1 0 SA2 0 SA3 0 SA4 1 SA5 1 SA6 1 SA7 1 SA8 1 SA9 1 Table 3. Am29LV001B Bottom Boot Sector Architecture Sector A16 SA0 0 SA1 0 SA2 0 SA3 0 SA4 0 SA5 0 SA6 1 SA7 1 SA8 1 SA9 ...

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... DQ7-DQ0. To access the autoselect codes in-system, the host system can issue the autoselect command via the command register, as shown in Table 5. This method does not require V details on using the autoselect mode. Table 4. Am29LV001B Autoselect Codes A16 A11 to to OE# WE# ...

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... Reset PLSCNT = 1 Increment PLSCNT No Yes PLSCNT = 1000? Yes Device failed Sector Unprotect Algorithm Am29LV001B START PLSCNT = 1 RESET Wait First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes No All sectors protected? Yes ...

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... See also “Requirements for Reading Array Data” in the “Device Bus Operations” section for more information. The Read Operations table provides the read parame- ters, and Figure 13 shows the timing diagram. Am29LV001B power-up and CC Write Inhibit is less than V ...

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... The first cycle must contain the data 90h; the second cycle the data 00h. Addresses are don’t cares for both cycles. The device then returns to reading array data. Figure 3 illustrates the algorithm for the program oper- ation. See the Erase/Program Operations table in “AC Am29LV001B ...

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... Timer” section.) The time-out begins from the rising edge of the final WE# pulse in the command sequence. Once the sector erase operation has begun, only the Erase Suspend command is valid. All other commands are ignored. Note that a hardware reset during the Am29LV001B 14 ...

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... START Write Erase Command Sequence Data Poll from System No Data = FFh? Erasure Completed Notes: 1. See Table 5 for erase command sequence. 2. See “DQ3: Sector Erase Timer” for more information. Figure 4. Erase Operation Am29LV001B Embedded Erase algorithm in progress Yes 21557C-7 ...

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... Table 5. Am29LV001B Command Definitions Command Sequence (Note 1) Addr Read (Note Reset (Note 6) 1 XXX Manufacturer ID 4 555 Device ID, Top Boot Block 4 555 Device ID, Bottom Boot Block Sector Protect 4 555 Verify (Note 8) Byte Program 4 555 Unlock Bypass 3 555 Unlock Bypass Program ...

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... During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously with DQ5. Figure 5. Data# Polling Algorithm Am29LV001B Yes Yes PASS 21557C-8 ...

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... Table 6 shows the outputs for Toggle Bit I on DQ6. Fig- ure 6 shows the toggle bit algorithm. Figure 18 in the “AC Characteristics” section shows the toggle bit timing diagrams. Figure 19 shows the differences between DQ2 and DQ6 in graphical form. See also the subsec- tion on DQ2: Toggle Bit II. Am29LV001B 18 ...

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... To ensure the command has been accepted, the system software should check the status of DQ3 prior to and following each subsequent sector erase command. If DQ3 is high on the second status check, the last command might not have been ac- cepted. Table 6 shows the outputs for DQ3. 21557C-9 Am29LV001B ...

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... DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further details Table 6. Write Operation Status DQ7 (Note 2) DQ6 DQ7# Toggle 0 Toggle 1 No toggle Data Data DQ7# Toggle Am29LV001B DQ5 DQ2 (Note 1) DQ3 (Note 2) 0 N/A No toggle 0 1 Toggle 0 N/A Toggle Data ...

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... Operating ranges define those limits between which the func- tionality of the device is guaranteed +0.8 V –0.5 V +0.5 V –2 Figure 7. Maximum Negative Overshoot Waveform +0.5 V 2.0 V Figure 8. Maximum Positive Overshoot Waveform Am29LV001B 21557C- 21557C-1 ...

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... 4.0 mA min I = –2 min I = –100 µ min . IH Am29LV001B Min Typ Max Unit 1.0 µA 35 µA 1.0 µ 0.2 5 µA 0.2 5 µA 0.2 5 µA –0 ...

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... Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 Note 1500 2000 2500 Time Frequency in MHz Figure 10. Typical I vs. Frequency CC1 Am29LV001B 3000 3500 4000 21557C-12 3 21557C-13 ...

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... Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels 21557C-14 INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Measurement Level Am29LV001B -45R, -70, -55 -90 Unit 1 TTL gate L 30 100 0.0– ...

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... Test Setup Read Toggle and Data# Polling t RC Addresses Stable t ACC OEH t CE HIGH Z Figure 13. Read Operations Timings Am29LV001B Speed Option -45R -55 -70 -90 Min Max Max Max 25 30 ...

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... RESET# n/a Am29F002NB Test Setup Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t RP Figure 14. RESET# Timings Am29LV001B All Speed Options Max 20 Max 500 Min 500 Min 50 Min 20 21557C-18 Unit µs ...

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... See the “Erase and Programming Performance” Section for more information -45R Min 45 Min Min 35 Min 20 Min Min Min Min Min Min 25 Min Typ Typ Min Am29LV001B -55 -70 -90 Unit ...

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... PA = program address program data WPH A0h is the true data at the program address. OUT Figure 15. Program Operation Timings Am29LV001B Read Status Data (last two cycles WHWH1 D Status OUT 21557C-19 28 ...

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... SA = sector address (for Sector Erase Valid Address for reading status data (see “Write Operation Status”). Figure 16. Chip/Sector Erase Operation Timings 555h for chip erase WPH t DH 55h 30h 10 for Chip Erase Am29LV001B Read Status Data WHWH2 In Complete Progress 21557C-20 ...

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... Complement Complement Status Data Status Data Valid Status Valid Status (first read) (second read) Am29LV001B VA High Z True Valid Data High Z True Valid Data 21557C- Valid Status Valid Data (stops toggling) 21557C-22 30 ...

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... Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure 19. DQ2 vs. DQ6 Min Min Program or Erase Command Sequence t RSP Am29LV001B Erase Resume Erase Erase Complete Read 21557C-23 All Speed Options 500 VIDR ...

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... WE# OE# Note: For sector protect For sector unprotect Figure 21. In-System Sector Protect/Unprotect Timing Diagram Valid* 60h Sector Protect: 100 µs Sector Unprotect Am29LV001B Valid* Valid* Verify 40h Status 21557C-25 32 ...

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... See the “Erase and Programming Performance” Section for more information -45 Min 45 Min Min 35 Min 20 Min Min Min Min Min Min 25 Min Typ Typ Am29LV001B -55 -70 -90 Unit ...

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... for program SA for sector erase 555 for chip erase Data# Polling GHEL t t WHWH1 CPH for program PD for program 55 for erase 30 for sector erase 10 for chip erase Am29LV001B PA DQ7# D OUT 21557C-26 34 ...

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... V, one pin at a time. CC Test Setup OUT Test Setup OUT Am29LV001B Unit Comments s Excludes 00h programming prior to erasure (Note 4) s µs Excludes system level overhead (Note 1,000,000 cycles. Additionally, CC Min Max –1.0 V 13.0 V –1 1 +100 mA ...

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... Pin 1 I.D. .595 .547 .553 .026 .032 TOP VIEW .009 .015 .125 .140 .080 .095 SEATING PLANE .013 .021 .050 REF. Am29LV001B .042 .056 .400 REF. .490 .530 16-038FPO-5 PL 032 DA79 SIDE VIEW 6-28- ...

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... PHYSICAL DIMENSIONS* TS 032 32-Pin Standard Thin Small Outline Package (measured in millimeters) Pin 1 I.D. 1 1.20 MAX * For reference only. BSC is an ANSI standard for Basic Space Centering 18.30 18.50 19.80 20.20 0˚ 5˚ Am29LV001B 0.95 1.05 7.90 8.10 0.50 BSC 0.05 0.15 0.08 16-038-TSOP-2 0.20 TS 032 0.10 DA95 3-25-97 lv 0.21 0.50 0.70 ...

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... MAX 0.25MM (0.0098") BSC * For reference only. BSC is an ANSI standard for Basic Space Centering REVISION SUMMARY FOR AM29LV001B Revision B Split the Am29LV001B/Am29LV010B data sheet, with the elimination of all references to Am29LV010B. Revision C Global Deleted 120 ns speed option; added 90 ns speed option. ...