NH82801GBM SL8YB Intel Corporation, NH82801GBM SL8YB Datasheet - Page 680

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NH82801GBM SL8YB

Manufacturer Part Number
NH82801GBM SL8YB
Description
Manufacturer
Intel Corporation
Datasheet

Specifications of NH82801GBM SL8YB

Case
BGA
Date_code
07+
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18.1.26
680
DSTS—Device Status Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 4Ah–4Bh
Default Value:
15:6
Bit
5
4
3
2
1
0
Reserved
Transactions Pending (TDP) — RO. This bit has no meaning for the root port since
only one transaction may be pending to the Intel
occur until it has already returned to 0.
AUX Power Detected (APD) — RO. The root port contains AUX power for wakeup.
Unsupported Request Detected (URD) — R/WC. This bit indicates an unsupported
request was detected.
Fatal Error Detected (FED) — R/WC. This bit indicates a fatal error was detected.
0 = Fatal has not occurred.
1 = A fatal error occurred from a data link protocol error, link training error, buffer
Non-Fatal Error Detected (NFED) — R/WC. This bit indicates a non-fatal error was
detected.
0 = Non-fatal has not occurred.
1 = A non-fatal error occurred from a poisoned TLP, unexpected completions,
Correctable Error Detected (CED) — R/WC. This bit indicates a correctable error
was detected.
0 = Correctable has not occurred.
1 = The port received an internal correctable error from receiver errors / framing
overflow, or malformed TLP.
unsupported requests, completer abort, or completer timeout.
errors, TLP CRC error, DLLP CRC error, replay num rollover, replay timeout.
0010h
PCI Express* Configuration Registers (Desktop and Mobile Only)
Description
Attribute:
Size:
®
ICH7, so a read of this bit cannot
Intel
R/WC, RO
16 bits
®
ICH7 Family Datasheet

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