K4T1G164QE-HCF7

Manufacturer Part NumberK4T1G164QE-HCF7
ManufacturerSamsung
K4T1G164QE-HCF7 datasheet
 


Specifications of K4T1G164QE-HCF7

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Table 3 - DDR2-400/533 tDS1/tDH1 derating with single-ended data strobe
∆tDS1, ∆tDH1 Derating Values for DDR2-400, DDR2-533(All units in ‘ps’; the note applies to the entire table)
2.0 V/ns
1.5 V/ns
∆tDS
∆tDH
∆tDS
∆tDH
1
1
1
1
2.0
188
188
167
146
1.5
146
167
125
125
1.0
63
125
42
83
DQ
0.9
-
-
31
69
Slew
0.8
-
-
-
-
rate
0.7
-
-
-
-
V/ns
0.6
-
-
-
-
0.5
-
-
-
-
0.4
-
-
-
-
For all input signals the total tDS (setup time) and tDH (hold time) required is calculated by adding the data sheet tDS(base) and tDH(base) value to the
∆tDS and ∆tDH derating value respectively. Example: tDS (total setup time) =tDS(base) +∆tDS.
Setup (tDS) nominal slew rate for a rising signal is defined as the slew rate between the last crossing of V
Setup (tDS) nominal slew rate for a falling signal is defined as the slew rate between the last crossing of V
If the actual signal is always earlier than the nominal slew rate line between shaded ’V
(See Figure 5 for differential data strobe and Figure 6 for single-ended data strobe.) If the actual signal is later than the nominal slew rate line anywhere
between shaded ’V
(DC) to ac region’, the slew rate of a tangent line to the actual signal from the ac level to dc level is used for derating value (see
REF
Figure 7 for differential data strobe and Figure 8 for single-ended data strobe)
Hold (tDH) nominal slew rate for a rising signal is defined as the slew rate between the last crossing of V
Hold (tDH) nominal slew rate for a falling signal is defined as the slew rate between the last crossing of V
the actual signal is always later than the nominal slew rate line between shaded ’dc level to V
(see Figure 9 for differential data strobe and Figure 10 for single-ended data strobe) If the actual signal is earlier than the nominal slew rate line anywhere
between shaded ’dc to V
(DC) region’, the slew rate of a tangent line to the actual signal from the dc level to V
REF
(see Figure 11 for differential data strobe and Figure 12 for single-ended data strobe)
Although for slow slew rates the total setup time might be negative (i.e. a valid input signal will not have reached V
transition) a valid input signal is still required to complete the transition and reach V
For slew rates in between the values listed in Tables 1, 2 and 3, the derating values may obtained by linear interpolation.
These values are typically not subject to production test. They are verified by design and characterization.
DQS Single-ended Slew Rate
1.0 V/ns
0.9 V/ns
0.8 V/ns
∆tDS
∆tDH
∆tDS
∆tDH
∆tDS
∆tDH
1
1
1
1
1
1
125
63
-
-
-
-
83
42
81
43
-
-
0
0
-2
1
-7
-13
-11
-14
-13
-13
-18
-27
-25
-31
-27
-30
-32
-44
-
-
-45
-53
-50
-67
-
-
-
-
-74
-96
-
-
-
-
-
-
-
-
-
-
-
-
REF
(AC).
IH/IL
25 of 45
DDR2 SDRAM
0.7 V/ns
0.6 V/ns
0.5 V/ns
∆tDS
∆tDH
∆tDS
∆tDH
∆tDS
∆tDH
1
1
1
1
1
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-29
-45
-
-
-
-
-43
-62
-60
-86
-
-
-61
-85
-78
-109
-108
-152
-85
-114
-102
-138
-138
-181
-128
-156
-145
-180
-175
-223
-
-
-210
-243
-240
-286
(DC) and the first crossing of V
REF
(DC) and the first crossing of V
REF
(DC) to ac region’, use nominal slew rate for derating value
(DC)max and the first crossing of V
IL
(DC)min and the first crossing of V
IH
(DC) region’, use nominal slew rate for derating value
REF
(DC) level is used for derating value
REF
(AC) at the time of the rising clock
IH/IL
Rev. 1.1 December 2008
0.4 V/ns
∆tDS
∆tDH
1
1
-
-
-
-
-
-
-
-
-
-
-
-
-183
-246
-226
-288
-291
-351
(AC)min.
IH
(AC)max.
IL
(DC).
REF
(DC). If
REF