AT91RM9200CJ-002 ATMEL Corporation, AT91RM9200CJ-002 Datasheet

AT91RM9200CJ-002

Manufacturer Part Number

AT91RM9200CJ-002

Description

Manufacturer

ATMEL Corporation

Datasheet

1.AT91RM9200CJ-002.pdf (689 pages)

Specifications of AT91RM9200CJ-002

Case

BGA256

Date_code

09+

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Bonase Electronics (HK) Co., Limited

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Company:

Bonase Electronics (HK) Co., Limited

Part Number:

AT91RM9200CJ-002

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ATMEL

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Features

•

Incorporates the ARM920T

Low Power: On VDDCORE 24.4 mA in Normal Mode, 520 µA in Standby Mode

Additional Embedded Memories

External Bus Interface (EBI)

System Peripherals for Enhanced Performance:

Ethernet MAC 10/100 Base-T

USB 2.0 Full Speed (12 Mbits per second) Host Double Port

USB 2.0 Full Speed (12 Mbits per second) Device Port

Multimedia Card Interface (MCI)

Three Synchronous Serial Controllers (SSC)

Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART)

Master/Slave Serial Peripheral Interface (SPI)

Two 3-channel, 16-bit Timer/Counters (TC)

Two-wire Interface (TWI)

IEEE

Power Supplies

Available in a 208-pin Green PQFP or 256-ball RoHS-compliant BGA Package

– 200 MIPS at 180 MHz, Memory Management Unit

– 16-KByte Data Cache, 16-KByte Instruction Cache, Write Buffer

– In-circuit Emulator including Debug Communication Channel

– Mid-level Implementation Embedded Trace Macrocell

– 16K Bytes of SRAM and 128K Bytes of ROM

– Supports SDRAM, Static Memory, Burst Flash, Glueless Connection to

– Enhanced Clock Generator and Power Management Controller

– Two On-chip Oscillators with Two PLLs

– Very Slow Clock Operating Mode and Software Power Optimization Capabilities

– Four Programmable External Clock Signals

– System Timer Including Periodic Interrupt, Watchdog and Second Counter

– Real-time Clock with Alarm Interrupt

– Debug Unit, Two-wire UART and Support for Debug Communication Channel

– Advanced Interrupt Controller with 8-level Priority, Individually Maskable Vectored

– Seven External Interrupt Sources and One Fast Interrupt Source

– Four 32-bit PIO Controllers with Up to 122 Programmable I/O Lines, Input Change

– 20-channel Peripheral DMA Controller (PDC)

– Media Independent Interface (MII) or Reduced Media Independent Interface (RMII)

– Integrated 28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit

– Dual On-chip Transceivers (Single Port Only on 208-lead PQFP Package)

– Integrated FIFOs and Dedicated DMA Channels

– On-chip Transceiver, 2-Kbyte Configurable Integrated FIFOs

– Automatic Protocol Control and Fast Automatic Data Transfers

– MMC and SD Memory Card-compliant, Supports Up to Two SD Memory Cards

– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter

– I

– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer

– Support for ISO7816 T0/T1 Smart Card

– Hardware Handshaking

– RS485 Support, IrDA

– Full Modem Control Lines on USART1

– 8- to 16-bit Programmable Data Length, 4 External Peripheral Chip Selects

– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel

– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability

– Master Mode Support, All 2-wire Atmel EEPROMs Supported

– 1.65V to 1.95V for VDDCORE, VDDOSC and VDDPLL

– 3.0V to 3.6V for VDDIOP (Peripheral I/Os) and for VDDIOM (Memory I/Os)

only)

CompactFlash

Interrupt Sources, Spurious Interrupt Protected

Interrupt and Open-drain Capability on Each Line

S Analog Interface Support, Time Division Multiplex Support

1149.1 JTAG Boundary Scan on All Digital Pins

and NAND Flash/SmartMedia

Up To 115 Kbps

™

ARM

Thumb

Processor

™

(256-ball BGA Package

ARM920T-based

Microcontroller

AT91RM9200

Rev. 1768G-ATARM–29-Sep-06

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