24LC256ISN Microchip Technology Inc., 24LC256ISN Datasheet
24LC256ISN
Manufacturer Part Number
24LC256ISN
Description
SOP8
Manufacturer
Microchip Technology Inc.
Datasheet
1.24LC256ISN.pdf
(26 pages)
Specifications of 24LC256ISN
Date_code
08+
Device Selection Table
Features:
• Low-power CMOS technology:
• 2-wire serial interface bus, I
• Cascadable for up to eight devices
• Self-timed erase/write cycle
• 64-byte Page Write mode available
• 5 ms max. write cycle time
• Hardware write-protect for entire array
• Output slope control to eliminate ground bounce
• Schmitt Trigger inputs for noise suppression
• 1,000,000 erase/write cycles
• Electrostatic discharge protection > 4000V
• Data retention > 200 years
• 8-pin PDIP, SOIC, TSSOP, MSOP and DFN
• Pb-free finishes available
• Temperature ranges:
Package Types
*24XX256 is used in this document as a generic part number for the 24AA256/24LC256/24FC256 devices.
© 2005 Microchip Technology Inc.
Note 1:
24AA256
24LC256
24FC256
- Maximum write current 3 mA at 5.5V
- Maximum read current 400 A at 5.5V
- Standby current 100 nA, typical at 5.5V
packages, 14-lead TSSOP package
- Industrial (I):
- Automotive (E):
Number
Note: * Pins A0 and A1 are no connects for the MSOP package only.
Part
2:
V
A0
A1
A2
SS
100 kHz for V
400 kHz for V
1
2
3
4
2.5-5.5V
1.8-5.5V
1.8-5.5V
PDIP/SOIC
Range
V
CC
256K I
CC
CC
8
7
6
5
-40 C to +85 C
-40 C to +125 C
Max. Clock
< 2.5V.
< 2.5V.
Frequency
400 kHz
2
1 MHz
400 kHz
V
WP
SCL
SDA
C
CC
™
compatible
(2)
2
(1)
24AA256/24LC256/24FC256
C
™
Ranges
Temp.
CMOS Serial EEPROM
I, E
I
I
V
A0
A1
A2
SS
TSSOP/MSOP*
1
2
3
4
Description:
The Microchip Technology Inc. 24AA256/24LC256/
24FC256 (24XX256*) is a 32K x 8 (256 Kbit) Serial
Electrically Erasable PROM, capable of operation
across a broad voltage range (1.8V to 5.5V). It has
been developed for advanced, low-power applications
such as personal communications or data acquisition.
This device also has a page write capability of up to 64
bytes of data. This device is capable of both random
and sequential reads up to the 256K boundary.
Functional address lines allow up to eight devices on
the same bus, for up to 2 Mbit address space. This
device is available in the standard 8-pin plastic DIP,
SOIC, TSSOP, MSOP and DFN packages.
Block Diagram
SDA
I/O
8
7
6
5
Control
Logic
V
V
I/O
CC
SS
V
WP
SCL
SDA
SCL
CC
A0 A1A2
Memory
Control
Logic
WP
V
A0
A1
A2
SS
XDEC
1
2
3
4
DFN
DS21203N-page 1
8
7
6
5
HV Generator
Page Latches
Sense Amp.
R/W Control
EEPROM
Array
V
WP
SCL
SDA
YDEC
CC
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