AT89C51ED2SLSIM ATMEL Corporation, AT89C51ED2SLSIM Datasheet

AT89C51ED2SLSIM

Manufacturer Part Number

AT89C51ED2SLSIM

Description

PLCC-44

Manufacturer

ATMEL Corporation

Datasheet

1.AT89C51ED2SLSIM.pdf (4 pages)

Specifications of AT89C51ED2SLSIM

Date_code

05+

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Active Errata List

•

Errata History

Errata Descriptions

1. During UART Reception, Clearing REN May Generate Unexpected IT

2. Timer 2 – Baud Rate Generator

3. C51 Core

4. PCA

5. Timer0/1

Lot Number

All

During UART Reception, Clearing REN May Generate Unexpected IT

Timer 2 – Baud Rate Generator – Long Start Time

C51 Core – Bad Exit of Power-down in X2 Mode

PCA

Timer0/1

Boot process - Upper 2Kbytes execution with BLJB=0

During UART reception, if the REN bit is cleared between start bit detection and

the end of reception, the UART will not discard the data (RI is set).

Workaround

Test REN at the beginning of Interrupt routine directly after CLR RI, and run the

Interrupt routine code only if REN is set.

When Timer 2 is used as a baud rate generator, TH2 is not loaded with RCAP2H

at the beginning, then UART is not operational before 10,000 machine cycles.

Workaround

Add the initialization of TH2 and TL2 in the initialization of Timer 2.

When exiting power-down mode by interrupt while CPU is in X2 mode, it leads to

bad execution of the first instruction run when CPU restarts.

Workaround

Set the CPU in X1 mode diretly before entering power-down mode.

When starting the microcontroller in X2 mode upon reset with the X2 fuse bit of

the HSB, the PCA may not work properly when configured with Timer 0 in X1

mode as clock input.

Workaround

Set the CPU in X2 mode by software by writing CKCON register at the begin of

the application.

When Timer0 is in X1 mode and Timer1 in X2 mode and vice versa, extra inter-

rupt may randomly occur for Timer0 or Timer1.

Workaround

Use the same mode for the two timers..

–

Incorrect Behavior with CPU X2 Mode Bit of HSB

–

Incorrect behavior with CPU X2 mode bit of HSB

Extra Interrupt

–

Extra Interrupt

Bad Exit of Power-down in X2 Mode

–

Long Start Time

Errata List

1, 2, 3, 4, 5, 6

80C51 MCUs

AT89C51RD2

AT89C51ED2

Errata Sheet

Rev. 4257D–8051–04/04

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