MBM29DL800TA70PFTN Fujitsu, MBM29DL800TA70PFTN Datasheet
MBM29DL800TA70PFTN
Manufacturer Part Number
MBM29DL800TA70PFTN
Description
TSSOP48
Manufacturer
Fujitsu
Datasheet
1.MBM29DL800BA90PFTN.pdf
(56 pages)
FUJITSU SEMICONDUCTOR
FLASH MEMORY
CMOS
8M (1M
MBM29DL800TA
Embedded Erase
FEATURES
• Single 3.0 V read, program, and erase
• Simultaneous operations
• Compatible with JEDEC-standard commands
• Compatible with JEDEC-standard worldwide pinouts (Pin compatible with MBM29LV800TA/BA)
• Minimum 100,000 program/erase cycles
• High performance
• Sector erase architecture
• Boot Code Sector Architecture
• Embedded Erase
• Embedded Program
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
• Automatic sleep mode
• Low V
• Erase Suspend/Resume
DATA SHEET
Minimizes system level power requirements
Read-while-Erase or Read-while-Program
Uses same software commands as E
48-pin TSOP(1) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
48-ball FBGA (Package suffix: PBT)
70 ns maximum access time
Two 16 K byte, four 8 K bytes, two 32 K byte, and fourteen 64 K bytes.
Any combination of sectors can be concurrently erased. Also supports full chip erase.
T = Top sector
B = Bottom sector
Automatically pre-programs and erases the chip or any sector
Automatically writes and verifies data at specified address
Hardware method for detection of program or erase cycle completion
When addresses remain stable, automatically switch themselves to low power mode.
Suspends the erase operation to allow a read in another sector within the same device
CC
TM
write inhibit
and Embedded Program
TM
Algorithms
TM
Algorithms
2.5 V
TM
8 / 512K
-70/90
are trademarks of Advanced Micro Devices, Inc.
2
PROMs
/MBM29DL800BA
16) BIT
-70/90
DS05-20860-6E
(Continued)
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