MC74LCX16373DTG ON Semiconductor, MC74LCX16373DTG Datasheet

MC74LCX16373DTG

Manufacturer Part Number

MC74LCX16373DTG

Description

IC TRANSP LATCH 16BIT 48-TSSOP

Manufacturer

ON Semiconductor

Series

74LCXr

Datasheet

1.MC74LCX16373DTG.pdf (7 pages)

Specifications of MC74LCX16373DTG

Logic Type

D-Type Transparent Latch

Circuit

8:8

Output Type

Tri-State

Voltage - Supply

2 V ~ 3.6 V

Independent Circuits

Delay Time - Propagation

1.5ns

Current - Output High, Low

24mA, 24mA

Operating Temperature

-55°C ~ 125°C

Mounting Type

Surface Mount

Package / Case

48-TSSOP

Number Of Circuits

Logic Family

LCX

Polarity

Non-Inverting

High Level Output Current

- 24 mA

Low Level Output Current

32 mA

Propagation Delay Time

5.9 ns at 2.7 V, 5.4 ns at 3.3 V

Supply Voltage (max)

3.6 V

Supply Voltage (min)

2 V

Maximum Operating Temperature

+ 125 C

Minimum Operating Temperature

- 55 C

Mounting Style

SMD/SMT

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

MC74LCX16373DTG
MC74LCX16373DTGOS

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MC74LCX16373

Low-Voltage CMOS 16-Bit

Transparent Latch

With 5 V−Tolerant Inputs and Outputs

(3−State, Non−Inverting)

transparent latch operating from a 2.3 V to 3.6 V supply. The device is

byte controlled. Each byte has separate Output Enable and Latch Enable

inputs. These control pins can be tied together for full 16−bit operation.

High impedance TTL compatible inputs significantly reduce current

loading to input drivers while TTL compatible outputs offer improved

switching noise performance. A V

MC74LCX16373 inputs to be safely driven from 5.0 V devices.

5.0 V−tolerant outputs. When the Latch Enable (LEn) inputs are HIGH,

data on the Dn inputs enters the latches. In this condition, the latches are

transparent, i.e., a latch output will change state each time its D input

changes. When LE is LOW, the latches store the information that was

present on the D inputs a setup time preceding the HIGH−to−LOW

transition of LE. The 3−state outputs are controlled by the Output

Enable (OEn) inputs. When OE is LOW, the outputs are enabled. When

OE is HIGH, the standard outputs are in the high impedance state, but

this does not interfere with new data entering into the latches.

Features

•

*For additional information on our Pb−Free strategy and soldering details, please

July, 2010 − Rev. 8

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

The MC74LCX16373 is a high performance, non−inverting 16−bit

The MC74LCX16373 contains 16 D−type latches with 3−state

Substantially Reduces System Power Requirements

Designed for 2.3 to 3.6 V V

5.4 ns Maximum t

5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic

Supports Live Insertion and Withdrawal

LVTTL Compatible

LVCMOS Compatible

24 mA Balanced Output Sink and Source Capability

Near Zero Static Supply Current in All Three Logic States (20 mA)

Latchup Performance Exceeds 500 mA

ESD Performance: Human Body Model >2000 V;

These are Pb−Free Devices*

OFF

Specification Guarantees High Impedance When V

Machine Model >200 V

Operation

specification of 5.5 V allows

= 0 V

See detailed ordering and shipping information in the package

dimensions section on page 3 of this data sheet.

ORDERING INFORMATION

MARKING DIAGRAM

http://onsemi.com

LCX16373G

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

AWLYYWW

Publication Order Number:

CASE 1201

DT SUFFIX

TSSOP−48

MC74LCX16373/D

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MC74LCX16373DTG Summary of contents

Page 1

... Machine Model >200 V • These are Pb−Free Devices* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2010 July, 2010 − Rev. 8 specification of 5.5 V allows ...

Page 2

OE1 LE1 GND GND ...

Page 3

... ORDERING INFORMATION Device MC74LCX16373DT MC74LCX16373DTG MC74LCX16373DTR2 M74LCX16373DTR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. MAXIMUM RATINGS Symbol Parameter V DC Supply Voltage Input Voltage ...

Page 4

DC ELECTRICAL CHARACTERISTICS Symbol Characteristic V HIGH Level Input Voltage (Note LOW Level Input Voltage (Note HIGH Level Output Voltage OH V LOW Level Output Voltage OL I Input Leakage Current I I 3−State ...

Page 5

DYNAMIC SWITCHING CHARACTERISTICS Symbol Characteristic V Dynamic LOW Peak Voltage OLP (Note 4) V Dynamic LOW Valley Voltage OLV (Note 4) 4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output ...

Page 6

PULSE GENERATOR R T Figure 4. Test Circuit Table 3. TEST CIRCUIT TEST PLH PHL PZL PLZ Open Collector/Drain t and t PLH PHL PZH PHZ ...

Page 7

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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