W986432AH-7 Winbond, W986432AH-7 Datasheet

W986432AH-7

Manufacturer Part Number

W986432AH-7

Description

Manufacturer

Winbond

Datasheet

1.W986432AH-7.pdf (44 pages)

Specifications of W986432AH-7

Case

TSSOP

Date_code

01+

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Bonase Electronics (HK) Co., Limited

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W986432AH-7

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Winbond

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GENERAL DESCRIPTION

W986432AH is a high-speed synchronous dynamic random access memory (SDRAM), organized as

512K words

W986432AH delivers a data bandwidth of up to 732M bytes per second (-55). For different

application, W986432AH is sorted into four speed grades: -55, -6, -7 and -8.

Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be

accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE

command. Column addresses are automatically generated by the SDRAM internal counter in burst

operation. Random column read is also possible by providing its address at each clock cycle. The

multiple bank nature enables interleaving among internal banks to hide the precharging time.

By having a programmable Mode Register, the system can change burst length, latency cycle,

interleave or sequential burst to maximize its performance. W986432AH is ideal for main memory in

high performance applications.

FEATURES

PIN CONFIGURATION

Burst read, single write operation

3.3V ±0.3V power supply

524288 words

Auto Refresh and Self Refresh

CAS latency: 2 and 3

Burst Length: 1, 2, 4, 8, and full page

Sequential and Interleave burst

4 banks

32 bits. Using pipelined architecture and 0.20

32 bits organization

512K

- 1 -

4 BANKS

Byte data controlled by DQM

Power-down Mode

Auto-precharge and controlled precharge

4K refresh cycles/64 mS

Interface: LVTTL

Packaged in 86-pin TSOP II, 400 mil - 0.50

Publication Release Date: December 1999

32 BITS SDRAM

m process technology,

W986432AH

Revision A1

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